这是描述信息
兆易创新GD32-GigaDevice-兆易创新代理

兆易创新GD32E230G8U6-GD32 ARM Cortex-M23 Microcontroller

兆易创新GD32E230G8U6-GD32 ARM Cortex-M23 Microcontroller GigaDevice Semiconductor Inc. GD32E230xx ARM® Cortex®-M23 32-bit MCU Datasheet General description The GD32E230xx device belongs to the value line of GD32 MCU family. It is a new 32-bit general-purpose microcontroller based on the ARM® Cortex®-M23 core. The Cortex-M23 processor is an energy-efficient processor with a very low gate count. It is intended to be used for microcontroller and deeply embedded applications that require an area-optimized processor. The processor delivers high energy efficiency through a small but powerful instruction set and extensively optimized design, providing high-end processing hardware including a single-cycle multiplier and a 17-cycle divider. The GD32E230xx device incorporates the ARM® Cortex®-M23 32-bit processor core operating at up to 72 MHz frequency with Flash accesses 0~2 wait states to obtain maximum efficiency. It provides up to 64 KB embedded Flash memory and up to 8 KB SRAM memory. An extensive range of enhanced I/Os and peripherals connected to two APB buses. The devices offer one 12-bit ADC and one comparator, up to five general 16-bit timers, a basic timer, a PWM advanced timer, as well as standard and advanced communication interfaces: up to two SPIs, two I2Cs, two USARTs, and an I2S. The device operates from a 1.8 to 3.6 V power supply and available in –40 to +85 °C temperature range. Several power saving modes provide the flexibility for maximum optimization between wakeup latency and power consumption, an especially important consideration in low power applications. The above features make the GD32E230xx devices suitable for a wide range of applications, especially in areas such as industrial control, motor drives, user interface, power monitor and alarm systems, consumer and handheld equipment, gaming and GPS, E-bike and so on.   Device information Table 2-1. GD32E230xx devices features and peripheral list   Part Number GD32E230xx   K4U6 K6U6 K8U6 K4T6 K6T6 K8T6 C4T6 C6T6 C8T6 FLASH (KB) 16 32 64 16 32 64 16 32 64 SRAM (KB) 4 6 8 4 4 8 4 6 8 Timers General timer(16-bit) 4 (2,13,15,16) 4 (2,13,15,16) 5 (2,13-16) 4 (2,13,15,16) 4 (2,13,15,16) 5 (2,13-16) 4 (2,13,15,16) 4 (2,13,15,16) 5 (2,13-16)   Advanced timer(16-bit) 1 (0) 1 (0) 1 (0) 1 (0) 1 (0) 1 (0) 1 (0) 1 (0) 1 (0)   SysTick 1 1 1 1 1 1 1 1 1   Basic timer(16-bit) 1 (5) 1 (5) 1 (5) 1 (5) 1 (5) 1 (5) 1 (5) 1 (5) 1 (5)   Watchdog 2 2 2 2 2 2 2 2 2   RTC 1 1 1 1 1 1 1 1 1 Connectivity   USART 1 (0) 2 (0-1) 2 (0-1) 1 (0) 2 (0-1) 2 (0-1) 1 (0) 2 (0-1) 2 (0-1)     I2C 1 (0) 1 (0) 2 (0-1) 1 (0) 1 (0) 2 (0-1) 1 (0) 1 (0) 2 (0-1)     SPI/I2S 1/1 (0)/(0) 1/1 (0)/(0) 2/1 (0-1)/(0) 1/1 (0)/(0) 1/1 (0)/(0) 2/1 (0-1)/(0) 1/1 (0)/(0) 1/1 (0)/(0) 2/1 (0-1)/(0) GPIO 27 27 27 25 25 25 39 39 39 CMP 1 1 1 1 1 1 1 1 1 EXTI 16 16 16 16 16 16 16 16 16 ADC Units
兆易创新GD32-GigaDevice-兆易创新代理
产品描述

兆易创新GD32E230G8U6-GD32 ARM Cortex-M23 Microcontroller

GigaDevice Semiconductor Inc.
GD32E230xx
ARM® Cortex®-M23 32-bit MCU
Datasheet

General description

The GD32E230xx device belongs to the value line of GD32 MCU family. It is a new 32-bit general-purpose microcontroller based on the ARM® Cortex®-M23 core. The Cortex-M23 processor is an energy-efficient processor with a very low gate count. It is intended to be used for microcontroller and deeply embedded applications that require an area-optimized processor. The processor delivers high energy efficiency through a small but powerful instruction set and extensively optimized design, providing high-end processing hardware including a single-cycle multiplier and a 17-cycle divider.
The GD32E230xx device incorporates the ARM® Cortex®-M23 32-bit processor core operating at up to 72 MHz frequency with Flash accesses 0~2 wait states to obtain maximum efficiency. It provides up to 64 KB embedded Flash memory and up to 8 KB SRAM memory. An extensive range of enhanced I/Os and peripherals connected to two APB buses. The devices offer one 12-bit ADC and one comparator, up to five general 16-bit timers, a basic timer, a PWM advanced timer, as well as standard and advanced communication interfaces: up to two SPIs, two I2Cs, two USARTs, and an I2S.
The device operates from a 1.8 to 3.6 V power supply and available in –40 to +85 °C temperature range. Several power saving modes provide the flexibility for maximum optimization between wakeup latency and power consumption, an especially important consideration in low power applications.
The above features make the GD32E230xx devices suitable for a wide range of applications, especially in areas such as industrial control, motor drives, user interface, power monitor and alarm systems, consumer and handheld equipment, gaming and GPS, E-bike and so on.

 

Device information

Table 2-1. GD32E230xx devices features and peripheral list

 

Part Number

GD32E230xx

 

K4U6

K6U6

K8U6

K4T6

K6T6

K8T6

C4T6

C6T6

C8T6

FLASH (KB)

16

32

64

16

32

64

16

32

64

SRAM (KB)

4

6

8

4

4

8

4

6

8

Timers

General

timer(16-bit)

4

(2,13,15,16)

4

(2,13,15,16)

5

(2,13-16)

4

(2,13,15,16)

4

(2,13,15,16)

5

(2,13-16)

4

(2,13,15,16)

4

(2,13,15,16)

5

(2,13-16)

 

Advanced

timer(16-bit)

1

(0)

1

(0)

1

(0)

1

(0)

1

(0)

1

(0)

1

(0)

1

(0)

1

(0)

 

SysTick

1

1

1

1

1

1

1

1

1

 

Basic

timer(16-bit)

1

(5)

1

(5)

1

(5)

1

(5)

1

(5)

1

(5)

1

(5)

1

(5)

1

(5)

 

Watchdog

2

2

2

2

2

2

2

2

2

 

RTC

1

1

1

1

1

1

1

1

1

Connectivity

 

USART

1

(0)

2

(0-1)

2

(0-1)

1

(0)

2

(0-1)

2

(0-1)

1

(0)

2

(0-1)

2

(0-1)

 

 

I2C

1

(0)

1

(0)

2

(0-1)

1

(0)

1

(0)

2

(0-1)

1

(0)

1

(0)

2

(0-1)

 

 

SPI/I2S

1/1

(0)/(0)

1/1

(0)/(0)

2/1

(0-1)/(0)

1/1

(0)/(0)

1/1

(0)/(0)

2/1

(0-1)/(0)

1/1

(0)/(0)

1/1

(0)/(0)

2/1

(0-1)/(0)

GPIO

27

27

27

25

25

25

39

39

39

CMP

1

1

1

1

1

1

1

1

1

EXTI

16

16

16

16

16

16

16

16

16

ADC

Units

1

1

1

1

1

1

1

1

1

 

Channels

(External)

 

10

 

10

 

10

 

10

 

10

 

10

 

10

 

10

 

10

 

Channels

(Internal)

 

2

 

2

 

2

 

2

 

2

 

2

 

2

 

2

 

2

Package

QFN32

LQFP32

LQFP48

 

 

Part Number

GD32E230xx

 

F4V6

F6V6

F8V6

F4P6

F6P6

F8P6

G4U6

G6U6

G8U6

FLASH (KB)

16

32

64

16

32

64

16

32

64

SRAM (KB)

4

6

8

4

6

8

4

6

8

Timers

General

timer(16-bit)

4

(2,13,15,16)

4

(2,13,15,16)

4

(2,13,15,16)

4

(2,13,15,16)

4

(2,13,15,16)

4

(2,13,15,16)

4

(2,13,15,16)

4

(2,13,15,16)

5

(2,13-16)

 

Advanced

timer(16-bit)

1

(0)

1

(0)

1

(0)

1

(0)

1

(0)

1

(0)

1

(0)

1

(0)

1

(0)

 

SysTick

1

1

1

1

1

1

1

1

1

 

Basic

timer(16-bit)

1

(5)

1

(5)

1

(5)

1

(5)

1

(5)

1

(5)

1

(5)

1

(5)

1

(5)

 

Watchdog

2

2

2

2

2

2

2

2

2

 

RTC

1

1

1

1

1

1

1

1

1

Connectivity

 

USART

1

(0)

2

(0-1)

2

(0-1)

1

(0)

2

(0-1)

2

(0-1)

1

(0)

2

(0-1)

2

(0-1)

 

 

I2C

1

(0)

1

(0)

2

(0-1)

1

(0)

1

(0)

2

(0-1)

1

(0)

1

(0)

2

(0-1)

 

 

SPI/I2S

1/1

(0)/(0)

1/1

(0)/(0)

2/1

(0-1)/(0)

1/1

(0)/(0)

1/1

(0)/(0)

2/1

(0-1)/(0)

1/1

(0)/(0)

1/1

(0)/(0)

2/1

(0-1)/(0)

GPIO

15

15

15

15

15

15

23

23

23

CMP

1

1

1

1

1

1

1

1

1

EXTI

16

16

16

16

16

16

16

16

16

ADC

Units

1

1

1

1

1

1

1

1

1

 

Channels

(External)

 

9

 

9

 

9

 

9

 

9

 

9

 

10

 

10

 

10

 

Channels

(Internal)

 

2

 

2

 

2

 

2

 

2

 

2

 

2

 

2

 

2

Package

LGA20

TSSOP20

QFN28

 

Memory map

Table 2-3. GD32E230xx memory map

Pre-defined

Regions

 

Bus

 

ADDRESS

 

Peripherals

 

 

0xE000 0000 - 0xE00F FFFF

Cortex M23 internal peripherals

External Device

 

0xA000 0000 - 0xDFFF FFFF

Reserved

External RAM

 

0x60000000 - 0x9FFFFFFF

Reserved

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Peripherals

 

AHB1

0x5004 0000 - 0x5FFF FFFF

Reserved

 

 

0x5000 0000 - 0x5003 FFFF

Reserved

 

 

 

 

 

AHB2

0x4800 1800 - 0x4FFF FFFF

Reserved

 

 

0x4800 1400 - 0x4800 17FF

GPIOF

 

 

0x4800 1000 - 0x4800 13FF

Reserved

 

 

0x4800 0C00 - 0x4800 0FFF

Reserved

 

 

0x4800 0800 - 0x4800 0BFF

GPIOC

 

 

0x4800 0400 - 0x4800 07FF

GPIOB

 

 

0x4800 0000 - 0x4800 03FF

GPIOA

 

 

 

 

 

 

 

AHB1

0x4002 4400 - 0x47FF FFFF

Reserved

 

 

0x4002 4000 - 0x4002 43FF

Reserved

 

 

0x4002 3400 - 0x4002 3FFF

Reserved

 

 

0x4002 3000 - 0x4002 33FF

CRC

 

 

0x4002 2400 - 0x4002 2FFF

Reserved

 

 

0x4002 2000 - 0x4002 23FF

FMC

 

 

0x4002 1400 - 0x4002 1FFF

Reserved

 

 

0x4002 1000 - 0x4002 13FF

RCU

 

 

0x4002 0400 - 0x4002 0FFF

Reserved

 

 

0x4002 0000 - 0x4002 03FF

DMA

 

 

 

 

 

 

 

 

 

 

 

APB2

0x4001 8000 - 0x4001 FFFF

Reserved

 

 

0x4001 5C00 - 0x4001 7FFF

Reserved

 

 

0x4001 5800 - 0x4001 5BFF

DBG

 

 

0x4001 4C00 - 0x4001 57FF

Reserved

 

 

0x4001 4800 - 0x4001 4BFF

TIMER16

 

 

0x4001 4400 - 0x4001 47FF

TIMER15

 

 

0x4001 4000 - 0x4001 43FF

TIMER14

 

 

0x4001 3C00 - 0x4001 3FFF

Reserved

 

 

0x4001 3800 - 0x4001 3BFF

USART0

 

 

0x4001 3400 - 0x4001 37FF

Reserved

 

 

0x4001 3000 - 0x4001 33FF

SPI0/I2S0

 

 

0x4001 2C00 - 0x4001 2FFF

TIMER0

 

 

0x4001 2800 - 0x4001 2BFF

Reserved

 

 

0x4001 2400 - 0x4001 27FF

ADC

 

 

0x4001 0800 - 0x4001 23FF

Reserved

 

Pre-defined

Regions

 

Bus

 

ADDRESS

 

Peripherals

 

 

0x4001 0400 - 0x4001 07FF

EXTI

 

 

0x4001 0000 - 0x4001 03FF

SYSCFG + CMP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

APB1

0x4000 CC00 - 0x4000 FFFF

Reserved

 

 

0x4000 C800 - 0x4000 CBFF

Reserved

 

 

0x4000 C400 - 0x4000 C7FF

Reserved

 

 

0x4000 C000 - 0x4000 C3FF

Reserved

 

 

0x4000 8000 - 0x4000 BFFF

Reserved

 

 

0x4000 7C00 - 0x4000 7FFF

Reserved

 

 

0x4000 7800 - 0x4000 7BFF

Reserved

 

 

0x4000 7400 - 0x4000 77FF

Reserved

 

 

0x4000 7000 - 0x4000 73FF

PMU

 

 

0x4000 6400 - 0x4000 6FFF

Reserved

 

 

0x4000 6000 - 0x4000 63FF

Reserved

 

 

0x4000 5C00 - 0x4000 5FFF

Reserved

 

 

0x4000 5800 - 0x4000 5BFF

I2C1

 

 

0x4000 5400 - 0x4000 57FF

I2C0

 

 

0x4000 4800 - 0x4000 53FF

Reserved

 

 

0x4000 4400 - 0x4000 47FF

USART1

 

 

0x4000 4000 - 0x4000 43FF

Reserved

 

 

0x4000 3C00 - 0x4000 3FFF

Reserved

 

 

0x4000 3800 - 0x4000 3BFF

SPI1

 

 

0x4000 3400 - 0x4000 37FF

Reserved

 

 

0x4000 3000 - 0x4000 33FF

FWDGT

 

 

0x4000 2C00 - 0x4000 2FFF

WWDGT

 

 

0x4000 2800 - 0x4000 2BFF

RTC

 

 

0x4000 2400 - 0x4000 27FF

Reserved

 

 

0x4000 2000 - 0x4000 23FF

TIMER13

 

 

0x4000 1400 - 0x4000 1FFF

Reserved

 

 

0x4000 1000 - 0x4000 13FF

TIMER5

 

 

0x4000 0800 - 0x4000 0FFF

Reserved

 

 

0x4000 0400 - 0x4000 07FF

TIMER2

 

 

0x4000 0000 - 0x4000 03FF

Reserved

 

SRAM

 

0x2000 2000 - 0x3FFF FFFF

Reserved

 

 

0x2000 0000 - 0x2000 1FFF

SRAM

 

 

 

Code

 

0x1FFF F810 - 0x1FFF FFFF

Reserved

 

 

0x1FFF F800 - 0x1FFF F80F

Option bytes

 

 

0x1FFF EC00 - 0x1FFF F7FF

System memory

 

 

0x0801 0000 - 0x1FFF EBFF

Reserved

 

 

0x0800 0000 - 0x0800 FFFF

Main Flash memory

 

 

0x0001 0000 - 0x07FF FFFF

Reserved

 

GD32E230Cx LQFP48 pin definitions

Table 2-4. GD32E230Cx LQFP48 pin definitions

 

Pin Name

 

Pins

Pin

Type(1)

I/O

Level(2)

 

Functions description

VDD

1

P

 

Default: VDD

PC13- TAMPER-

RTC

 

2

 

I/O

 

 

Default: PC13

Additional: RTC_TAMP0, RTC_TS, RTC_OUT, WKUP1

PC14-

OSC32IN

 

3

 

I/O

 

Default: PC14 Additional: OSC32IN

PC15-

OSC32OUT

 

4

 

I/O

 

Default: PC15 Additional: OSC32OUT

 

PF0-OSCIN

 

5

 

I/O

 

5VT

Default: PF0 Alternate: I2C0_SDA

Additional: OSCIN

 

PF1- OSCOUT

 

6

 

I/O

 

5VT

Default: PF1

Alternate: I2C0_SCL Additional: OSCOUT

NRST

7

I/O

 

Default: NRST

VSSA

8

P

 

Default: VSSA

VDDA

9

P

 

Default: VDDA

 

 

PA0-WKUP

 

 

10

 

 

I/O

 

Default: PA0

Alternate: USART0_CTS(3), USART1_CTS(4), CMP_OUT, I2C1_SCL(5)

Additional: ADC_IN0, CMP_IM6, RTC_TAMP1, WKUP0

 

 

PA1

 

 

11

 

 

I/O

 

Default: PA1

Alternate: USART0_RTS(3), USART1_RTS(4), I2C1_SDA(5), EVENTOUT, TIMER14_CH0_ON(5)

Additional: ADC_IN1, CMP_IP

 

 

PA2

 

 

12

 

 

I/O

 

Default: PA2

Alternate: USART0_TX(3), USART1_TX(4), TIMER14_CH0(5)

Additional: ADC_IN2, CMP_IM7

 

 

PA3

 

 

13

 

 

I/O

 

Default: PA3

Alternate: USART0_RX(3), USART1_RX(4), TIMER14_CH1(5)

Additional: ADC_IN3

 

 

PA4

 

 

14

 

 

I/O

 

Default: PA4

Alternate: SPI0_NSS, I2S0_WS, USART0_CK(3), USART1_CK(4), TIMER13_CH0, SPI1_NSS(5)

Additional: ADC_IN4, CMP_IM4

 

 

Pin Name

 

Pins

Pin

Type(1)

I/O

Level(2)

 

Functions description

 

 

 

 

Default: PA5

PA5

15

I/O

 

Alternate: SPI0_SCK, I2S0_CK

 

 

 

 

Additional: ADC_IN5, CMP_IM5

 

 

 

 

Default: PA6

 

 

 

 

Alternate: SPI0_MISO, I2S0_MCK, TIMER2_CH0,

PA6

16

I/O

 

TIMER0_BRKIN, TIMER15_CH0, EVENTOUT,

 

 

 

 

CMP_OUT

 

 

 

 

Additional: ADC_IN6

 

 

 

 

Default: PA7

 

 

 

 

Alternate: SPI0_MOSI, I2S0_SD, TIMER2_CH1,

PA7

17

I/O

 

TIMER13_CH0, TIMER0_CH0_ON, TIMER16_CH0,

 

 

 

 

EVENTOUT

 

 

 

 

Additional: ADC_IN7

 

 

 

 

Default: PB0

PB0

18

I/O

 

Alternate: TIMER2_CH2, TIMER0_CH1_ON,

USART1_RX(4), EVENTOUT

 

 

 

 

Additional: ADC_IN8

 

 

 

 

Default: PB1

PB1

19

I/O

 

Alternate: TIMER2_CH3, TIMER13_CH0,

TIMER0_CH2_ON, SPI1_SCK(5)

 

 

 

 

Additional: ADC_IN9

 

PB2

 

20

 

I/O

 

5VT

Default: PB2

Alternate: TIMER2_ETI

 

 

 

 

Default: PB10

PB10

21

I/O

5VT

Alternate: I2C0_SCL(3),I2C1_SCL(5), SPI1_IO2(5),

 

 

 

 

SPI1_SCK(5)

 

 

 

 

Default: PB11

PB11

22

I/O

5VT

Alternate: I2C0_SDA(3),I2C1_SDA(5), EVENTOUT,

 

 

 

 

SPI1_IO3(5)

VSS

23

P

 

Default: VSS

VDD

24

P

 

Default: VDD

 

 

 

 

Default: PB12

PB12

25

I/O

5VT

Alternate: SPI0_NSS(3), SPI1_NSS(5), TIMER0_BRKIN,

 

 

 

 

I2C1_SMBA(5), EVENTOUT

 

 

 

 

Default: PB13

PB13

26

I/O

5VT

Alternate: SPI0_SCK(3), SPI1_SCK(5), TIMER0_CH0_ON,

 

 

 

 

I2C1_TXFRAME(5), I2C1_SCL(5)

 

 

 

 

Default: PB14

PB14

27

I/O

5VT

Alternate: SPI0_MISO(3), SPI1_MISO(5),

 

 

 

 

TIMER0_CH1_ON, TIMER14_CH0(5), I2C1_SDA(5)

 

 

 

 

Default: PB15

 

 

 

 

Alternate: SPI0_MOSI(3), SPI1_MOSI(5),

PB15

28

I/O

5VT

TIMER0_CH2_ON, TIMER14_CH0_ON(5),

 

 

 

 

TIMER14_CH1(5)

 

 

 

 

Additional: RTC_REFIN, WKUP6

 

 

Pin Name

 

Pins

Pin Type(1)

I/O Level(2)

 

Functions description

 

PA8

 

29

 

I/O

 

5VT

Default: PA8

Alternate: USART0_CK, TIMER0_CH0, CK_OUT, USART1_TX(4), EVENTOUT

 

PA9

 

30

 

I/O

 

5VT

Default: PA9

Alternate: USART0_TX, TIMER0_CH1, TIMER14_BRKIN(5), I2C0_SCL, CK_OUT

 

PA10

 

31

 

I/O

 

5VT

Default: PA10

Alternate: USART0_RX, TIMER0_CH2,

TIMER16_BRKIN, I2C0_SDA

 

PA11

 

32

 

I/O

 

5VT

Default: PA11

Alternate: USART0_CTS, TIMER0_CH3, CMP_OUT, EVENTOUT, SPI1_IO2(5), I2C0_SMBA, I2C1_SCL(5)

 

PA12

 

33

 

I/O

 

5VT

Default: PA12

Alternate: USART0_RTS, TIMER0_ETI, EVENTOUT, SPI1_IO3(5), I2C0_TXFRAME, I2C1_SDA(5)

 

PA13

 

34

 

I/O

 

5VT

Default: PA13/SWDIO

Alternate: SWDIO, IFRP_OUT, SPI1_MISO(5)

 

PF6

 

35

 

I/O

 

5VT

Default: PF6

Alternate: I2C0_SCL(3), I2C1_SCL(5)

 

PF7

 

36

 

I/O

 

5VT

Default: PF7

Alternate: I2C0_SDA(3), I2C1_SDA(5)

 

PA14

 

37

 

I/O

 

5VT

Default: PA14/SWCLK

Alternate: USART0_TX(3), USART1_TX(4), SWCLK, SPI1_MOSI(5)

 

PA15

 

38

 

I/O

 

5VT

Default: PA15

Alternate: SPI0_NSS, I2S0_WS, USART0_RX(3), USART1_RX(4), SPI1_NSS(5), EVENTOUT

 

PB3

 

39

 

I/O

 

5VT

Default: PB3

Alternate: SPI0_SCK, I2S0_CK, EVENTOUT

 

PB4

 

40

 

I/O

 

5VT

Default: PB4

Alternate: SPI0_MISO, I2S0_MCK, TIMER2_CH0, EVENTOUT, I2C0_TXFRAME, TIMER16_BRKIN

 

 

PB5

 

 

41

 

 

I/O

 

 

5VT

Default: PB5

Alternate: SPI0_MOSI,I2S0_SD, I2C0_SMBA, TIMER15_BRKIN, TIMER2_CH1

Additional: WKUP5

 

PB6

 

42

 

I/O

 

5VT

Default: PB6

Alternate: I2C0_SCL, USART0_TX, TIMER15_CH0_ON

 

PB7

 

43

 

I/O

 

5VT

Default: PB7

Alternate:I2C0_SDA, USART0_RX,TIMER16_CH0_ON

BOOT0

44

I

 

Default: BOOT0

 

PB8

 

45

 

I/O

 

5VT

Default: PB8

Alternate: I2C0_SCL, TIMER15_CH0

 

PB9

 

46

 

I/O

 

5VT

Default: PB9

Alternate: I2C0_SDA, IFRP_OUT, TIMER16_CH0,

 

 

Pin Name

 

Pins

Pin Type(1)

I/O Level(2)

 

Functions description

 

 

 

 

EVENTOUT, I2S0_MCK, SPI1_NSS(5)

VSS

47

P

 

Default: VSS

VDD

48

P

 

Default: VDD

Notes:
(1)Type: I = input, O = output, P = power.
(2)I/O Level: 5VT = 5 V tolerant.
(3)Functions are available on GD32E230C4 devices only.
(4)Functions are available on GD32E230C8/6 devices.
(5)Functions are available on GD32E230C8 devices only.
 

GD32E230Kx LQFP32 pin definitions

Table 2-5. GD32E230Kx LQFP32 pin definitions

 

Pin Name

 

Pins

Pin

Type(1)

I/O

Level(2)

 

Functions description

VDD

1

P

 

Default: VDD

 

PF0-OSCIN

 

2

 

I/O

 

5VT

Default: PF0 Alternate: I2C0_SDA

Additional: OSCIN

 

PF1- OSCOUT

 

3

 

I/O

 

5VT

Default: PF1

Alternate: I2C0_SCL Additional: OSCOUT

NRST

4

I/O

 

Default: NRST

VDDA

5

P

 

Default: VDDA

 

 

PA0-WKUP

 

 

6

 

 

I/O

 

Default: PA0

Alternate: USART0_CTS(3), USART1_CTS(4), CMP_OUT, I2C1_SCL(5)

Additional: ADC_IN0, CMP_IM6, RTC_TAMP1, WKUP0

 

 

PA1

 

 

7

 

 

I/O

 

Default: PA1

Alternate: USART0_RTS(3), USART1_RTS(4), I2C1_SDA(5), EVENTOUT, TIMER14_CH0_ON(5)

Additional: ADC_IN1, CMP_IP

 

 

PA2

 

 

8

 

 

I/O

 

Default: PA2

Alternate: USART0_TX(3), USART1_TX(4), TIMER14_CH0(5)

Additional: ADC_IN2, CMP_IM7

 

 

PA3

 

 

9

 

 

I/O

 

Default: PA3

Alternate: USART0_RX(3), USART1_RX(4), TIMER14_CH1(5)

Additional: ADC_IN3

 

PA4

 

10

 

I/O

 

Default: PA4

Alternate: SPI0_NSS, I2S0_WS, USART0_CK(3), USART1_CK(4), TIMER13_CH0, SPI1_NSS(5)

 

 

Pin Name

 

Pins

Pin

Type(1)

I/O

Level(2)

 

Functions description

 

 

 

 

Additional: ADC_IN4, CMP_IM4

 

 

 

 

Default: PA5

PA5

11

I/O

 

Alternate: SPI0_SCK, I2S0_CK

 

 

 

 

Additional: ADC_IN5, CMP_IM5

 

 

 

 

Default: PA6

 

 

 

 

Alternate: SPI0_MISO, I2S0_MCK, TIMER2_CH0,

PA6

12

I/O

 

TIMER0_BRKIN, TIMER15_CH0, EVENTOUT,

 

 

 

 

CMP_OUT

 

 

 

 

Additional: ADC_IN6

 

 

 

 

Default: PA7

 

 

 

 

Alternate: SPI0_MOSI, I2S0_SD, TIMER2_CH1,

PA7

13

I/O

 

TIMER13_CH0, TIMER0_CH0_ON, TIMER16_CH0,

 

 

 

 

EVENTOUT

 

 

 

 

Additional: ADC_IN7

 

 

 

 

Default: PB0

PB0

14

I/O

 

Alternate: TIMER2_CH2, TIMER0_CH1_ON,

USART1_RX(4), EVENTOUT

 

 

 

 

Additional: ADC_IN8

 

 

 

 

Default: PB1

PB1

15

I/O

 

Alternate: TIMER2_CH3, TIMER13_CH0,

TIMER0_CH2_ON, SPI1_SCK(5)

 

 

 

 

Additional: ADC_IN9

VSS

16

P

 

Default: VSS

VDD

17

P

 

Default: VDD

 

 

 

 

Default: PA8

PA8

18

I/O

5VT

Alternate: USART0_CK, TIMER0_CH0, CK_OUT,

 

 

 

 

USART1_TX(4), EVENTOUT

 

 

 

 

Default: PA9

PA9

19

I/O

5VT

Alternate: USART0_TX, TIMER0_CH1,

 

 

 

 

TIMER14_BRKIN(5), I2C0_SCL, CK_OUT

 

 

 

 

Default: PA10

PA10

20

I/O

5VT

Alternate: USART0_RX, TIMER0_CH2,

 

 

 

 

TIMER16_BRKIN, I2C0_SDA

 

 

 

 

Default: PA11

PA11

21

I/O

5VT

Alternate: USART0_CTS, TIMER0_CH3, CMP_OUT,

 

 

 

 

EVENTOUT, SPI1_IO2(5), I2C0_SMBA, I2C1_SCL(5)

 

 

 

 

Default: PA12

PA12

22

I/O

5VT

Alternate: USART0_RTS, TIMER0_ETI, EVENTOUT,

 

 

 

 

SPI1_IO3(5), I2C0_TXFRAME, I2C1_SDA(5)

 

PA13

 

23

 

I/O

 

5VT

Default: PA13/SWDIO

Alternate: SWDIO, IFRP_OUT, SPI1_MISO(5)

 

 

 

 

Default: PA14/SWCLK

PA14

24

I/O

5VT

Alternate: USART0_TX(3), USART1_TX(4), SWCLK,

 

 

 

 

SPI1_MOSI(5)

 

PA15

 

25

 

I/O

 

5VT

Default: PA15

Alternate: SPI0_NSS, I2S0_WS, USART0_RX(3),

 

 

Pin Name

 

Pins

Pin Type(1)

I/O Level(2)

 

Functions description

 

 

 

 

USART1_RX(4), SPI1_NSS(5), EVENTOUT

 

PB3

 

26

 

I/O

 

5VT

Default: PB3

Alternate: SPI0_SCK, I2S0_CK, EVENTOUT

 

PB4

 

27

 

I/O

 

5VT

Default: PB4

Alternate: SPI0_MISO, I2S0_MCK, TIMER2_CH0, EVENTOUT, I2C0_TXFRAME, TIMER16_BRKIN

 

 

PB5

 

 

28

 

 

I/O

 

 

5VT

Default: PB5

Alternate: SPI0_MOSI,I2S0_SD, I2C0_SMBA, TIMER15_BRKIN, TIMER2_CH1

Additional: WKUP5

 

PB6

 

29

 

I/O

 

5VT

Default: PB6

Alternate: I2C0_SCL, USART0_TX, TIMER15_CH0_ON

 

PB7

 

30

 

I/O

 

5VT

Default: PB7

Alternate:I2C0_SDA, USART0_RX,TIMER16_CH0_ON

BOOT0

31

I

 

Default: BOOT0

VSS

32

P

 

Default: VSS

Notes:
(1)Type: I = input, O = output, P = power.
(2)I/O Level: 5VT = 5 V tolerant.
(3)Functions are available on GD32E230K4 devices only.
(4)Functions are available on GD32E230K8/6 devices.
(5)Functions are available on GD32E230K8 devices only.

GD32E230Kx QFN32 pin definitions

Table 2-6. GD32E230Kx QFN32 pin definitions

 

Pin Name

 

Pins

Pin

Type(1)

I/O

Level(2)

 

Functions description

VDD

1

P

 

Default: VDD

 

PF0-OSCIN

 

2

 

I/O

 

5VT

Default: PF0 Alternate: I2C0_SDA

Additional: OSCIN

 

PF1- OSCOUT

 

3

 

I/O

 

5VT

Default: PF1 Alternate: I2C0_SCL

Additional: OSCOUT

NRST

4

I/O

 

Default: NRST

VDDA

5

P

 

Default: VDDA

 

 

PA0-WKUP

 

 

6

 

 

I/O

 

Default: PA0

Alternate: USART0_CTS(3), USART1_CTS(4), CMP_OUT, I2C1_SCL(5)

Additional: ADC_IN0, CMP_IM6, RTC_TAMP1, WKUP0

 

PA1

 

7

 

I/O

 

Default: PA1

Alternate: USART0_RTS(3), USART1_RTS(4), I2C1_SDA(5), EVENTOUT, TIMER14_CH0_ON(5)

 

 

Pin Name

 

Pins

Pin Type(1)

I/O Level(2)

 

Functions description

 

 

 

 

Additional: ADC_IN1, CMP_IP

 

 

PA2

 

 

8

 

 

I/O

 

Default: PA2

Alternate: USART0_TX(3), USART1_TX(4), TIMER14_CH0(5)

Additional: ADC_IN2, CMP_IM7

 

 

PA3

 

 

9

 

 

I/O

 

Default: PA3

Alternate: USART0_RX(3), USART1_RX(4), TIMER14_CH1(5)

Additional: ADC_IN3

 

 

PA4

 

 

10

 

 

I/O

 

Default: PA4

Alternate: SPI0_NSS, I2S0_WS, USART0_CK(3), USART1_CK(4), TIMER13_CH0, SPI1_NSS(5)

Additional: ADC_IN4, CMP_IM4

 

PA5

 

11

 

I/O

 

Default: PA5

Alternate: SPI0_SCK, I2S0_CK Additional: ADC_IN5, CMP_IM5

 

 

PA6

 

 

12

 

 

I/O

 

Default: PA6

Alternate: SPI0_MISO, I2S0_MCK, TIMER2_CH0, TIMER0_BRKIN, TIMER15_CH0, EVENTOUT, CMP_OUT

Additional: ADC_IN6

 

 

PA7

 

 

13

 

 

I/O

 

Default: PA7

Alternate: SPI0_MOSI, I2S0_SD, TIMER2_CH1, TIMER13_CH0, TIMER0_CH0_ON, TIMER16_CH0, EVENTOUT

Additional: ADC_IN7

 

 

PB0

 

 

14

 

 

I/O

 

Default: PB0

Alternate: TIMER2_CH2, TIMER0_CH1_ON, USART1_RX(4), EVENTOUT

Additional: ADC_IN8

 

 

PB1

 

 

15

 

 

I/O

 

Default: PB1

Alternate: TIMER2_CH3, TIMER13_CH0, TIMER0_CH2_ON, SPI1_SCK(5)

Additional: ADC_IN9

 

PB2

 

16

 

I/O

 

5VT

Default: PB2

Alternate: TIMER2_ETI

VDD

17

P

 

Default: VDD

 

PA8

 

18

 

I/O

 

5VT

Default: PA8

Alternate: USART0_CK, TIMER0_CH0, CK_OUT, USART1_TX(4), EVENTOUT

 

PA9

 

19

 

I/O

 

5VT

Default: PA9

Alternate: USART0_TX, TIMER0_CH1, TIMER14_BRKIN(5), I2C0_SCL, CK_OUT

 

PA10

 

20

 

I/O

 

5VT

Default: PA10

Alternate: USART0_RX, TIMER0_CH2,

TIMER16_BRKIN, I2C0_SDA

 

 

Pin Name

 

Pins

Pin

Type(1)

I/O

Level(2)

 

Functions description

 

PA11

 

21

 

I/O

 

5VT

Default: PA11

Alternate: USART0_CTS, TIMER0_CH3, CMP_OUT, EVENTOUT, SPI1_IO2(5), I2C0_SMBA, I2C1_SCL(5)

 

PA12

 

22

 

I/O

 

5VT

Default: PA12

Alternate: USART0_RTS, TIMER0_ETI, EVENTOUT, SPI1_IO3(5), I2C0_TXFRAME, I2C1_SDA(5)

PA13

23

I/O

5VT

Default: PA13/SWDIO

Alternate: SWDIO, IFRP_OUT, SPI1_MISO(5)

 

PA14

 

24

 

I/O

 

5VT

Default: PA14/SWCLK

Alternate: USART0_TX(3), USART1_TX(4), SWCLK, SPI1_MOSI(5)

 

PA15

 

25

 

I/O

 

5VT

Default: PA15

Alternate: SPI0_NSS, I2S0_WS, USART0_RX(3), USART1_RX(4), SPI1_NSS(5), EVENTOUT

PB3

26

I/O

5VT

Default: PB3

Alternate: SPI0_SCK, I2S0_CK, EVENTOUT

 

PB4

 

27

 

I/O

 

5VT

Default: PB4

Alternate: SPI0_MISO, I2S0_MCK, TIMER2_CH0, EVENTOUT, I2C0_TXFRAME, TIMER16_BRKIN

 

 

PB5

 

 

28

 

 

I/O

 

 

5VT

Default: PB5

Alternate: SPI0_MOSI,I2S0_SD, I2C0_SMBA, TIMER15_BRKIN, TIMER2_CH1

Additional: WKUP5

PB6

29

I/O

5VT

Default: PB6

Alternate: I2C0_SCL, USART0_TX, TIMER15_CH0_ON

PB7

30

I/O

5VT

Default: PB7

Alternate:I2C0_SDA, USART0_RX,TIMER16_CH0_ON

BOOT0

31

I

 

Default: BOOT0

PB8

32

I/O

5VT

Default: PB8

Alternate: I2C0_SCL, TIMER15_CH0

Notes:
(1)Type: I = input, O = output, P = power.
(2)I/O Level: 5VT = 5 V tolerant.
(3)Functions are available on GD32E230K4 devices only.
(4)Functions are available on GD32E230K8/6 devices.
(5)Functions are available on GD32E230K8 devices only.

GD32E230Gx QFN28 pin definitions

Table 2-7. GD32E230Gx QFN28 pin definitions

 

Pin Name

 

Pins

Pin

Type(1)

I/O

Level(2)

 

Functions description

BOOT0

1

I

 

Default: BOOT0

PF0-OSCIN

2

I/O

5VT

Default: PF0

 

 

Pin Name

 

Pins

Pin

Type(1)

I/O

Level(2)

 

Functions description

 

 

 

 

Alternate: I2C0_SDA

 

 

 

 

Additional: OSCIN

PF1- OSCOUT

 

3

 

I/O

 

5VT

Default: PF1 Alternate: I2C0_SCL

Additional: OSCOUT

NRST

4

I/O

 

Default: NRST

VDDA

5

P

 

Default: VDDA

 

 

 

 

Default: PA0

PA0-WKUP

6

I/O

 

Alternate: USART0_CTS(3), USART1_CTS(4), CMP_OUT,

I2C1_SCL(5)

 

 

 

 

Additional: ADC_IN0, CMP_IM6, RTC_TAMP1, WKUP0

 

 

 

 

Default: PA1

PA1

7

I/O

 

Alternate: USART0_RTS(3), USART1_RTS(4),

I2C1_SDA(5), EVENTOUT, TIMER14_CH0_ON(5)

 

 

 

 

Additional: ADC_IN1, CMP_IP

 

 

 

 

Default: PA2

PA2

8

I/O

 

Alternate: USART0_TX(3), USART1_TX(4),

TIMER14_CH0(5)

 

 

 

 

Additional: ADC_IN2, CMP_IM7

 

 

 

 

Default: PA3

PA3

9

I/O

 

Alternate: USART0_RX(3), USART1_RX(4),

TIMER14_CH1(5)

 

 

 

 

Additional: ADC_IN3

 

 

 

 

Default: PA4

PA4

10

I/O

 

Alternate: SPI0_NSS, I2S0_WS, USART0_CK(3),

USART1_CK(4), TIMER13_CH0, SPI1_NSS(5)

 

 

 

 

Additional: ADC_IN4, CMP_IM4

 

 

 

 

Default: PA5

PA5

11

I/O

 

Alternate: SPI0_SCK, I2S0_CK

 

 

 

 

Additional: ADC_IN5, CMP_IM5

 

 

 

 

Default: PA6

 

 

 

 

Alternate: SPI0_MISO, I2S0_MCK, TIMER2_CH0,

PA6

12

I/O

 

TIMER0_BRKIN, TIMER15_CH0, EVENTOUT,

 

 

 

 

CMP_OUT

 

 

 

 

Additional: ADC_IN6

 

 

 

 

Default: PA7

 

 

 

 

Alternate: SPI0_MOSI, I2S0_SD, TIMER2_CH1,

PA7

13

I/O

 

TIMER13_CH0, TIMER0_CH0_ON, TIMER16_CH0,

 

 

 

 

EVENTOUT

 

 

 

 

Additional: ADC_IN7

 

 

 

 

Default: PB0

PB0

14

I/O

 

Alternate: TIMER2_CH2, TIMER0_CH1_ON,

USART1_RX(4), EVENTOUT

 

 

 

 

Additional: ADC_IN8

 

PB1

 

15

 

I/O

 

Default: PB1

Alternate: TIMER2_CH3, TIMER13_CH0,

 

 

Pin Name

 

Pins

Pin

Type(1)

I/O

Level(2)

 

Functions description

 

 

 

 

TIMER0_CH2_ON, SPI1_SCK(5)

Additional: ADC_IN9

VSS

16

P

 

Default: VSS

VDD

17

P

 

Default: VDD

 

PA8

 

18

 

I/O

 

5VT

Default: PA8

Alternate: USART0_CK, TIMER0_CH0, CK_OUT, USART1_TX(4), EVENTOUT

 

PA9(6)

 

19

 

I/O

 

5VT

Default: PA9

Alternate: USART0_TX, TIMER0_CH1, TIMER14_BRKIN(5), I2C0_SCL, CK_OUT

 

PA10(6)

 

20

 

I/O

 

5VT

Default: PA10

Alternate: USART0_RX, TIMER0_CH2,

TIMER16_BRKIN, I2C0_SDA

PA13

21

I/O

5VT

Default: PA13/SWDIO

Alternate: SWDIO, IFRP_OUT, SPI1_MISO(5)

 

PA14

 

22

 

I/O

 

5VT

Default: PA14/SWCLK

Alternate: USART0_TX(3), USART1_TX(4), SWCLK, SPI1_MOSI(5)

 

PA15

 

23

 

I/O

 

5VT

Default: PA15

Alternate: SPI0_NSS, I2S0_WS, USART0_RX(3), USART1_RX(4), SPI1_NSS(5), EVENTOUT

PB3

24

I/O

5VT

Default: PB3

Alternate: SPI0_SCK, I2S0_CK, EVENTOUT

 

PB4

 

25

 

I/O

 

5VT

Default: PB4

Alternate: SPI0_MISO, I2S0_MCK, TIMER2_CH0, EVENTOUT, I2C0_TXFRAME, TIMER16_BRKIN

 

 

PB5

 

 

26

 

 

I/O

 

 

5VT

Default: PB5

Alternate: SPI0_MOSI,I2S0_SD, I2C0_SMBA, TIMER15_BRKIN, TIMER2_CH1

Additional: WKUP5

PB6

27

I/O

5VT

Default: PB6

Alternate: I2C0_SCL, USART0_TX, TIMER15_CH0_ON

PB7

28

I/O

5VT

Default: PB7

Alternate:I2C0_SDA,USART0_RX,TIMER16_CH0_ON

Notes:
(1)Type: I = input, O = output, P = power.
(2)I/O Level: 5VT = 5 V tolerant.
(3)Functions are available on GD32E230G4 devices only.
(4)Functions are available on GD32E230G8/6 devices.
(5)Functions are available on GD32E230G8 devices only.

ARM® Cortex®-M23 core

The Cortex-M23 processor is an energy-efficient processor with a very low gate count. It is intended to be used for microcontroller and deeply embedded applications that require an area-optimized processor. The processor is highly configurable enabling a wide range of implementations from those requiring memory protection and powerful trace technology to cost sensitive devices requiring minimal area, while delivering outstanding computational performance and an advanced system response to interrupts.
32-bit ARM® Cortex®-M23 processor core
Up to 72 MHz operation frequency
Single-cycle multiplication and hardware divider
Ultra-low power, energy-efficient operation
Excellent code density
Integrated Nested Vectored Interrupt Controller (NVIC)
24-bit SysTick timer

The Cortex®-M23 processor is based on the ARMv8-M architecture and supports both Thumb and Thumb-2 instruction sets. Some system peripherals listed below are also provided by Cortex®-M23:
Internal Bus Matrix connected with AHB master, Serial Wire Debug Port and Single-cycle IO port
Nested Vectored Interrupt Controller (NVIC)
Breakpoint Unit(BPU)
Data Watchpoint and Trace (DWT)
Serial Wire Debug Port


Embedded memory

Up to 64 Kbytes of Flash memory
Up to 8 Kbytes of SRAM with hardware parity checking

64 Kbytes of inner Flash and 8 Kbytes of inner SRAM at most is available for storing programs and data, both accessed (R/W) at CPU clock speed with 0~2 wait states. Table 2-3. GD32E230xx memory map shows the memory map of the GD32E230xx series of devices, including code, SRAM, peripheral, and other pre-defined regions.

Clock, reset and supply management

Internal 8 MHz factory-trimmed RC and external 4 to 32 MHz crystal oscillator

Internal 28 MHz RC oscillator
Internal 40 KHz RC calibrated oscillator and external 32.768 KHz crystal oscillator
Integrated system clock PLL
1.8 to 3.6 V application supply and I/Os
Supply Supervisor: POR (Power On Reset), PDR (Power Down Reset), and low voltage detector (LVD)
The Clock Control Unit (CCU) provides a range of oscillator and clock functions. These include speed internal RC oscillator and external crystal oscillator, high speed and low speed two types. Several prescalers allow the frequency configuration of the AHB and two APB domains. The maximum frequency of the AHB, APB2 and APB1 domains is 72 MHz/72 MHz/72 MHz. See Figure 2-8. GD32E230xx clock tree for details on the clock tree.
The Reset Control Unit (RCU) controls three kinds of reset: system reset resets the processor core and peripheral IP components. Power-on reset (POR) and power-down reset (PDR) are always active, and ensures proper operation starting from 1.71 V and down to 1.67 V. The device remains in reset mode when VDD is below a specified threshold. The embedded low voltage detector (LVD) monitors the power supply, compares it to the voltage threshold and generates an interrupt as a warning message for leading the MCU into security.
Power supply schemes:
VDD range: 1.8 to 3.6 V, external power supply for I/Os and the internal regulator. Provided externally through VDD pins.
VSSA, VDDA range: 1.8 to 3.6 V, external analog power supplies for ADC, reset blocks, RCs and PLL. VDDA and VSSA must be connected to VDD and VSS, respectively.
VBAK range: 1.8 to 3.6 V, power supply for RTC, external clock 32 KHz oscillator and backup registers (through power switch) when VDD is not present.

Boot modes

At startup, boot pins are used to select one of three boot options:
Boot from main Flash memory (default)
Boot from system memory
Boot from on-chip SRAM

In default condition, boot from main Flash memory is selected. The boot loader is located in the internal boot ROM memory (system memory). It is used to reprogram the Flash memory by using USART0 (PA9 and PA10) or USART1 (PA14 and PA15 or PA2 and PA3).

Power saving modes

The MCU supports three kinds of power saving modes to achieve even lower power consumption. They are sleep mode, deep-sleep mode, and standby mode. These operating modes reduce the power consumption and allow the application to achieve the best balance

between the CPU operating time, speed and power consumption.
Sleep mode
In sleep mode, only the clock of CPU core is off. All peripherals continue to operate and any interrupt/event can wake up the system.
Deep-sleep mode
In deep-sleep mode, all clocks in the 1.2V domain are off, and all of the high speed crystal oscillator (IRC8M, HXTAL) and PLL are disabled. Only the contents of SRAM and registers are retained. Any interrupt or wakeup event from EXTI lines can wake up the system from the deep-sleep mode including the 16 external lines, the RTC alarm, RTC tamper and timestamp, CMP output, LVD output and USART wakeup. When exiting the deep-sleep mode, the IRC8M is selected as the system clock.
Standby mode
In standby mode, the whole 1.2V domain is power off, the LDO is shut down, and all of IRC8M, HXTAL and PLL are disabled. The contents of SRAM and registers (except backup registers) are lost. There are four wakeup sources for the standby mode, including the external reset from NRST pin, the RTC alarm, the FWDGT reset, and the rising edge on WKUP pin.

Analog to digital converter (ADC)

12-bit SAR ADC's conversion rate is up to 2 MSPS
12-bit, 10-bit, 8-bit or 6-bit configurable resolution
Hardware oversampling ratio adjustable from 2 to 256x improves resolution to 16-bit
Input voltage range: VSSA to VDDA
Temperature sensor

One 12-bit 2 MSPS multi-channel ADC is integrated in the device. It has a total of 12 multiplexed channels: up to 10 external channels, 1 channel for internal temperature sensor (VSENSE) and 1 channel for internal reference voltage (VREFINT). The input voltage range is between VSSA and VDDA. An on-chip hardware oversampling scheme improves performance while off-loading the related computational burden from the CPU. An analog watchdog block can be used to detect the channels, which are required to remain within a specific threshold window. A configurable channel management block can be used to perform conversions in single, continuous, scan or discontinuous mode to support more advanced use.
The ADC can be triggered from the events generated by the general level 0 timers (TIMERx) and the advanced timer (TIMER0) with internal connection. The temperature sensor can be used to generate a voltage that varies linearly with temperature. It is internally connected to the ADC_IN16 input channel which is used to convert the sensor output voltage in a digital value.

DMA

5 channels DMA controller
Peripherals supported: Timers, ADC, SPIs, I2Cs, USARTs and I2S

The flexible general-purpose DMA controllers provide a hardware method of transferring data between peripherals and/or memory without intervention from the CPU, thereby freeing up bandwidth for other system functions. Three types of access method are supported: peripheral to memory, memory to peripheral, memory to memory.
Each channel is connected to fixed hardware DMA requests. The priorities of DMA channel requests are determined by software configuration and hardware channel number. Transfer size of source and destination are independent and configurable.

General-purpose inputs/outputs (GPIOs)

Up to 39 fast GPIOs, all mappable on 16 external interrupt lines
Analog input/output configurable
Alternate function input/output configurable

There are up to 39 general purpose I/O pins (GPIO) in GD32E230xx, named PA0 ~ PA15 and PB0 ~ PB15, PC13 ~ PC15, PF0 ~ PF1, PF6 ~ PF7 to implement logic input/output functions. Each of the GPIO ports has related control and configuration registers to satisfy the requirements of specific applications. The external interrupts on the GPIO pins of the device have related control and configuration registers in the Interrupt/event controller (EXTI). The GPIO ports are pin-shared with other alternative functions (AFs) to obtain maximum flexibility on the package pins. Each of the GPIO pins can be configured by software as output (push- pull open-drain or analog), as input (with or without pull-up or pull-down) or as peripheral alternate function. Most of the GPIO pins are shared with digital or analog alternate functions. All GPIOs are high-current capable except for analog inputs.

Timers and PWM generation

One 16-bit advanced timer (TIMER0), up to five 16-bit general timers (TIMER2, TIMER13
~ TIMER16), and one 16-bit basic timer (TIMER5)
Up to 4 independent channels of PWM, output compare or input capture for each general timer and external trigger input
16-bit, motor control PWM advanced timer with programmable dead-time generation for output match
Encoder interface controller with two inputs using quadrature decoder
24-bit SysTick timer down counter
2 watchdog timers (free watchdog timer and window watchdog timer)

The advanced timer (TIMER0) can be used as a three-phase PWM multiplexed on 6 channels.

It has complementary PWM outputs with programmable dead-time generation. It can also be used as a complete general timer. The 4 independent channels can be used for input capture, output compare, PWM generation (edge- or center- aligned counting modes) and single pulse mode output. If configured as a general 16-bit timer, it has the same functions as the TIMERx timer. It can be synchronized with external signals or to interconnect with other general timers together which have the same architecture and features.
The general timer can be used for a variety of purposes including general time, input signal pulse width measurement or output waveform generation such as a single pulse generation or PWM output, up to 4 independent channels for input capture/output compare. TIMER2 is based on a 16-bit auto-reload up/down counter and a 16-bit prescaler. TIMER13 ~ TIMER16 is based on a 16-bit auto-reload up counter and a 16-bit prescaler. The general timer also supports an encoder interface with two inputs using quadrature decoder.
The basic timer, known as TIMER5 can also be used as a simple 16-bit time base.

The GD32E230xx have two watchdog peripherals, free watchdog and window watchdog. They offer a combination of high safety level, flexibility of use and timing accuracy.
The free watchdog timer includes a 12-bit down-counting counter and an 8-bit prescaler. It is clocked from an independent 40 KHz internal RC and as it operates independently of the main clock, it can operate in deep-sleep and standby modes. It can be used either as a watchdog to reset the device when a problem occurs, or as a free-running timer for application timeout management.
The window watchdog is based on a 7-bit down counter that can be set as free-running. It can be used as a watchdog to reset the device when a problem occurs. It is clocked from the main clock. It has an early wakeup interrupt capability and the counter can be frozen in debug mode.
The SysTick timer is dedicated for OS, but could also be used as a standard down counter. The features are shown below:
A 24-bit down counter
Auto reload capability
Maskable system interrupt generation when the counter reaches 0
Programmable clock source


Real time clock (RTC)

Independent binary-coded decimal (BCD) format timer/counter with five 32-bit backup registers.
Calendar with subsecond, second, minute, hour, week day, date, year and month automatically correction
Alarm function with wake up from deep-sleep and standby mode capability
On-the-fly correction for synchronization with master clock. Digital calibration with 0.954 ppm resolution for compensation of quartz crystal inaccuracy.

The real time clock is an independent timer which provides a set of continuously running counters in backup registers to provide a real calendar function, and provides an alarm interrupt or an expected interrupt. It is not reset by a system or power reset, or when the device wakes up from standby mode. In the RTC unit, there are two prescalers used for implementing the calendar and other functions. One prescaler is a 7-bit asynchronous prescaler and the other is a 15-bit synchronous prescaler.

Inter-integrated circuit (I2C)

Up to two I2C bus interfaces can support both master and slave mode with a frequency up to 1 MHz (Fast mode plus)
Provide arbitration function, optional PEC (packet error checking) generation and checking
Supports 7-bit and 10-bit addressing mode and general call addressing mode
Supports SAM_V mode

C interface is an internal circuit allowing communication with an external I2C interface which is an industry standard two line serial interface used for connection to external hardware. These two serial lines are known as a serial data line (SDA) and a serial clock line (SCL). The I2C module provides different data transfer rates: up to 100 KHz in standard mode, up to 400 KHz in the fast mode and up to 1 MHz in the fast mode plus. The I2C module also has an arbitration detect function to prevent the situation where more than one master attempts to transmit data to the I2C bus at the same time. A CRC-8 calculator is also provided in I2C interface to perform packet error checking for I2C data.

Serial peripheral interface (SPI)

Up to two SPI interfaces with a frequency of up to 18 MHz
Support both master and slave mode
Hardware CRC calculation and transmit automatic CRC error checking
Separate transmit and receive 32-bit FIFO with DMA capability (only in SPI1)
Data frame size can be 4 to 16 bits (only in SPI1)
Quad-SPI configuration available in master mode (only in SPI1)

The SPI interface uses 4 pins, among which are the serial data input and output lines (MISO & MOSI), the clock line (SCK) and the slave select line (NSS). Both SPIs can be served by the DMA controller. The SPI interface may be used for a variety of purposes, including simplex synchronous transfers on two lines with a possible bidirectional data line or reliable communication using CRC checking. Specially, SPI1 has separate transmit and receive 32- bit FIFO with DMA capability and its data frame size can be 4 to 16 bits. Quad-SPI master mode is also supported in SPI1.

Universal synchronous asynchronous receiver transmitter (USART)
Up to two USARTs with operating frequency up to 4.5 MBits/s
Supports both asynchronous and clocked synchronous serial communication modes
IrDA SIR encoder and decoder support
LIN break generation and detection
ISO 7816-3 compliant smart card interface

The USART (USART0, USART1) are used to translate data between parallel and serial interfaces, provides a flexible full duplex data exchange using synchronous or asynchronous transfer. It is also commonly used for RS-232 standard communication. The USART includes a programmable baud rate generator which is capable of dividing the system clock to produce a dedicated clock for the USART transmitter and receiver. The USART also supports DMA function for high speed data communication.

Inter-IC sound (I2S)

One I2S bus Interfaces with sampling frequency from 8 KHz to 192 KHz, multiplexed with SPI0
Support either master or slave mode

The Inter-IC sound (I2S) bus provides a standard communication interface for digital audio applications by 3-wire serial lines. GD32E230xx contain an I2S-bus interface that can be operated with 16/32 bit resolution in master or slave mode, pin multiplexed with SPI0. The audio sampling frequency from 8 KHz to 192 KHz is supported with less than 0.5% accuracy error.

Comparators (CMP)

One fast rail-to-rail low-power comparators with software configurable
Programmable reference voltage (internal or external I/O)

One Comparator (CMP) is implemented within the devices. It can wake up from deep-sleep mode to generate interrupts and breaks for the timers and also can be combined as a window comparator. The internal voltage reference is also connected to ADC_IN17 input channel of the ADC.

Debug mode

Serial wire debug port

Debug capabilities can be accessed by a debug tool via Serial Wire (SW - Debug Port).


Package and operation temperature

LQFP48 (GD32E230CxTx), LQFP32 (GD32E230KxTx), QFN32 (GD32E230KxUx), QFN28 (GD32E230GxUx), TSSOP20 (GD32E230FxPx) and LGA20 (GD32E230FxVx).
Operation temperature range: -40°C to +85°C (industrial level)

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18
2022-02

uA级别智能门锁低功耗雷达模块让门锁更加智能省电节约功耗

发布时间: : 2022-02--18
uA级别智能门锁低功耗雷达模块让门锁更加智能省电节约功耗,指纹门锁并不是什么新鲜事,我相信每个人都很熟悉。随着近年来智能家居的逐步普及,指纹门锁也进入了成千上万的家庭。今天的功耗雷达模块指纹门锁不仅消除了繁琐的钥匙,而且还提供了各种智能功能,uA级别智能门锁低功耗雷达模块用在智能门锁上,可以实现门锁的智能感应屏幕,使电池寿命延长3-5倍,如与其他智能家居连接,成为智能场景的开关。所以今天的指纹门锁更被称为智能门锁。 今天,让我们来谈谈功耗雷达模块智能门锁的安全性。希望能让更多想知道智能门锁的朋友认识下。 指纹识别是智能门锁的核心 指纹识别技术在我们的智能手机上随处可见。从以前的实体指纹识别到屏幕下的指纹识别,可以说指纹识别技术已经相当成熟。指纹识别可以说是整个uA级低功耗雷达模块智能门锁的核心。 目前主要有三种常见的指纹识别方法,即光学指纹识别、半导体指纹识别和超声指纹识别。 光学指纹识别 让我们先谈谈光学指纹识别的原理实际上是光的反射。我们都知道指纹本身是不均匀的。当光照射到我们的指纹上时,它会反射,光接收器可以通过接收反射的光来绘制我们的指纹。就像激光雷达测绘一样。 光学指纹识别通常出现在打卡机上,手机上的屏幕指纹识别技术也使用光学指纹识别。今天的光学指纹识别已经达到了非常快的识别速度。 然而,光学指纹识别有一个缺点,即硬件上的活体识别无法实现,容易被指模破解。通常,活体识别是通过软件算法进行的。如果算法处理不当,很容易翻车。 此外,光学指纹识别也容易受到液体的影响,湿手解锁的成功率也会下降。 超声指纹识别 超声指纹识别也被称为射频指纹识别,其原理与光学类型相似,但超声波使用声波反射,实际上是声纳的缩小版本。因为使用声波,不要担心水折射会降低识别率,所以超声指纹识别可以湿手解锁。然而,超声指纹识别在防破解方面与光学类型一样,不能实现硬件,可以被指模破解,活体识别仍然依赖于算法。 半导体指纹识别 半导体指纹识别主要采用电容、电场(即我们所说的电感)、温度和压力原理来实现指纹图像的收集。当用户将手指放在前面时,皮肤形成电容阵列的极板,电容阵列的背面是绝缘极板。由于不同区域指纹的脊柱与谷物之间的距离也不同,因此每个单元的电容量随之变化,从而获得指纹图像。半导体指纹识别具有价格低、体积小、识别率高的优点,因此大多数uA级低功耗雷达模块智能门锁都采用了这种方案。半导体指纹识别的另一个功能是活体识别。传统的硅胶指模无法破解。 当然,这并不意味着半导体可以百分识别活体。所谓的半导体指纹识别活体检测不使用指纹活体体征。本质上,它取决于皮肤的材料特性,这意味着虽然传统的硅胶指模无法破解。 一般来说,无论哪种指纹识别,都有可能被破解,只是说破解的水平。然而,今天的指纹识别,无论是硬件生活识别还是算法生活识别,都相对成熟,很难破解。毕竟,都可以通过支付级别的认证,大大保证安全。 目前,市场上大多数智能门锁仍将保留钥匙孔。除了指纹解锁外,用户还可以用传统钥匙开门。留下钥匙孔的主要目的是在指纹识别故障或智能门锁耗尽时仍有开门的方法。但由于有钥匙孔,它表明它可以通过技术手段解锁。 目前市场上的锁等级可分为A、B、C三个等级,这三个等级主要是通过防暴开锁和防技术开锁的程度来区分的。A级锁要求技术解锁时间不少于1分钟,B级锁要求不少于5分钟。即使是高级别的C级锁也只要求技术解锁时间不少于10分钟。 也就是说,现在市场上大多数门锁,无论是什么级别,在专业的解锁大师面前都糊,只不过是时间长短。 安全是重要的,是否安全增加了人们对uA级别低功耗雷达模块智能门锁安全的担忧。事实上,现在到处都是摄像头,强大的人脸识别,以及移动支付的出现,使家庭现金减少,所有这些都使得入室盗窃的成本急剧上升,近年来各省市的入室盗窃几乎呈悬崖状下降。 换句话说,无论锁有多安全,无论锁有多难打开,都可能比在门口安装摄像头更具威慑力。 因此,担心uA级别低功耗雷达模块智能门锁是否不安全可能意义不大。毕竟,家里的防盗锁可能不安全。我们应该更加关注门锁能给我们带来多少便利。 我们要考虑的是智能门锁的兼容性和通用性。毕竟,智能门锁近年来才流行起来。大多数人在后期将普通机械门锁升级为智能门锁。因此,智能门锁能否与原门兼容是非常重要的。如果不兼容,发现无法安装是一件非常麻烦的事情。 uA级别低功耗雷达模块智能门锁主要是为了避免带钥匙的麻烦。因此,智能门锁的便利性尤为重要。便利性主要体现在指纹的识别率上。手指受伤导致指纹磨损或老年人指纹较浅。智能门锁能否识别是非常重要的。 当然,如果指纹真的失效,是否有其他解锁方案,如密码解锁或NFC解锁。还需要注意密码解锁是否有虚假密码等防窥镜措施。 当然,智能门锁的耐久性也是一个需要特别注意的地方。uA级别低功耗雷达模块智能门锁主要依靠内部电池供电,这就要求智能门锁的耐久性尽可能好,否则经常充电或更换电池会非常麻烦。 智能门锁低功耗雷达模块:让门锁更加智能省电节约功耗 在当今信息化时代,智能门锁已经成为人们生活中不可或缺的一部分。对于门锁制造商来说,如何提高门锁的安全性、实用性和便利性,成为他们面对的重要课题。随着人们对门锁智能化的需求越来越高,门锁的能耗问题也成为了门锁制造商需要重视的问题。为此,越来越多的门锁制造商开始推出以低功耗为主题的系列产品。在这样的背景下,智能门锁低功耗雷达模块应运而生。 智能门锁低功耗雷达模块是一种新型技术,其采取雷达技术对门锁周围的物体进行探测,一旦发现门锁附近有人靠近,便会将门锁自动解锁,无需使用钥匙。同时,在保持智能控制的前提下,实现了门锁省电、节约功耗,延长门锁使用寿命。 在使用智能门锁低功耗雷达模块的门锁中,控制电路和自动解锁机制是关键的部件。控制电路采用先进的芯片技术,通过优秀的功耗控制以实现模块化管理。而自动解锁机制不仅可以通过微波信号控制实现门锁的无钥匙解锁,还能够在门锁未处理的情况下自动锁定,保障门锁的安全。 智能门锁低功耗雷达模块的主要特点是:低功耗、高灵敏度和高可靠性。该模块在进行人体检测时,可以远距离探测到距离为5-7米远处的人体信号,目标检测速度极快,而且对门锁周围的环境要求不高。同时,该模块采用了自适应自动补偿技术,能够根据不同环境的变化自动调整信号发射和接收参数,减小误检率。 在使用智能门锁低功耗雷达模块的门锁中,其功耗可以做到非常低,一组电池能够支持门锁持续使用几年左右。而且这样的智能门锁除了具有自动解锁的功能,还可与APP相互匹配,实现了远程操作的便捷性。 总的来说,智能门锁低功耗雷达模块的问世,解决了门锁安全性和省电节省方面的问题,是智能门锁材料不可或缺的一部分。作为门锁制造商,只有不断创新,利用这种新型技术,将会在行业中占据重要的地位。 除了上文所述的主要特点和优势,智能门锁低功耗雷达模块还具有以下几点: 1. 实时监测门锁周围环境变化,通过物体的距离体积和运动来确定是否有人靠近门锁,并控制门锁的开启或关闭,使得门锁更加智能化。 2. 可对门锁附件进行检测,如门挂、门应急照明灯以及紧急呼叫按钮等,并及时给出响应,确保门锁能够正常运作。这样,门锁在不受干扰的情况下,能够 保持安全通道。 3. 通过智能学习技术,能够自适应网站多种环境的变化,让智能门锁低功耗雷达模块更加准确和精细的控制门锁的开关,节约能耗并延长使用寿命。 4. 能够与其他智能电器相连,如智能家居系统、电视等,形成智能家居生态圈,更好地控制家庭访客进出,让生活更加方便。 综上所述,智能门锁低功耗雷达模块的出现,对提升门锁能耗管理和智能化有着重要作用。门锁制造商只有将这些新型技术运用到门锁产品中,才能更加贴合用户需求,满足消费市场的日益增长的智能化需求。
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14
2022-01

微波雷达传感器雷达感应浴室镜上的应用

发布时间: : 2022-01--14
微波雷达传感器雷达感应浴室镜上的应用,如今,家用电器的智能化已成为一种常态,越来越多的人开始在自己的浴室里安装智能浴室镜。但是还有很多人对智能浴镜的理解还不够深入,今天就来说说这个话题。 什么是智能浴室镜?智慧型浴室镜,顾名思义,就是卫浴镜子智能化升级,入门级产品基本具备了彩灯和镜面触摸功能,更高档次的产品安装有微波雷达传感器智能感应,当感应到有人接近到一定距离即可开启亮灯或者亮屏操作,也可三色无极调,智能除雾,语音交互,日程安排备忘,甚至在镜子上看电视,听音乐,气象预报,问题查询,智能控制,健康管理等。 智能化雷达感应浴室镜与普通镜的区别,为什么要选TA?,就功能而言,普通浴镜价格用它没有什么压力!而且雷达感应智能浴镜会让人犹豫不决是否“值得一看”。就功能和应用而言,普通浴镜功能单一,而微波雷达传感器智能浴室镜功能创新:镜子灯光色温和亮度可以自由调节,镜面还可以湿手触控,智能除雾,既环保又健康! 尽管智能浴镜比较新颖,但功能丰富,体验感更好,特别是入门级的智能浴镜,具有基础智能化功能,真的适合想体验下智能化的小伙伴们。 给卫生间安装微波雷达传感器浴室镜安装注意什么? ①确定智能浴室镜的安装位置,因为是安装时在墙壁上打孔,一旦安装后一般无法移动位置。 ②在选购雷达感应智能浴室镜时,根据安装位置确定镜子的形状和尺寸。 ③确定智能浴镜的安装位置后,在布线时为镜子预留好电源线。 ④确定微波雷达传感器智能浴镜的安装高度,一般智能浴镜的标准安装高度约85cm(从地砖到镜子底),具体安装高度要根据家庭成员的身高及使用习惯来决定。 ⑤镜面遇到污渍,可用酒精或30%清洁稀释液擦洗,平时可用干毛巾养护,注意多通风。
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19
2024-04

雷达模组市场人体自动感应开关原理

发布时间: : 2024-04--19
随着科技的不断发展,雷达模组市场的人体自动感应开关已经逐渐渗透到我们的日常生活中。无论是公共场所的灯光控制,还是家庭环境的智能化管理,人体自动感应开关都发挥着至关重要的作用。本文将对雷达模组市场的人体自动感应开关原理进行深入的探讨,旨在帮助读者更好地理解和应用这一技术。 一、雷达模组的基本原理 雷达模组,又称微波雷达传感器,是一种基于微波多普勒效应原理的探测设备。它通过发射微波信号并接收其反射回来的信号,来判断目标物体的存在、速度以及方向等信息。相较于红外传感器,雷达模组具有更高的穿透性和抗干扰能力,可以在复杂的环境条件下稳定工作。 在雷达模组中,发射器会发出一定频率的微波信号,这些信号在遇到目标物体后会发生反射。接收器则会接收这些反射回来的信号,并对其进行处理和分析。通过分析反射信号的强度、频率变化等参数,雷达模组可以准确地判断目标物体的状态。 二、人体自动感应开关的工作原理 人体自动感应开关利用雷达模组实现对人体动作的探测和识别。当人体进入雷达模组的探测范围时,其运动会改变周围环境的微波信号,这些变化被雷达模组捕捉并转化为电信号。通过对这些电信号的分析和处理,开关可以判断出人体的存在和运动状态,从而自动触发相应的动作,如开启灯光、启动电器等。 人体自动感应开关的工作过程可以分为以下几个步骤: 探测阶段:雷达模组不断发射微波信号并接收反射信号,形成对人体运动状态的实时监控。 信号处理阶段:雷达模组对接收到的信号进行滤波、放大和数字化处理,提取出与目标人体运动相关的信息。 判断阶段:基于处理后的信号,开关内部的算法会判断人体是否进入预设的感应区域,并识别其运动状态。 执行阶段:当判断为人体进入感应区域且满足预设条件时,开关会触发相应的动作,如打开灯光或启动其他设备。 三、人体自动感应开关的优势与应用 人体自动感应开关相较于传统的机械式开关或红外感应开关,具有诸多优势: 高灵敏度:雷达模组对人体运动的探测非常灵敏,即使在微弱的光线下也能稳定工作。 强抗干扰能力:雷达模组不受光线、颜色、温度等因素的影响,能够在各种复杂环境下稳定探测。 广泛适用性:无论是室内还是室外,人体自动感应开关都能有效工作,满足不同场景的需求。 基于以上优势,人体自动感应开关在多个领域得到了广泛应用: 公共场所:在走廊、楼梯、洗手间等公共区域,人体自动感应开关可以实现节能和便捷的灯光控制,提高空间的使用效率。 商业空间:在商场、超市、酒店等商业场所,人体自动感应开关可以根据人流情况自动调整灯光亮度,营造舒适的购物环境。 家庭环境:在家庭环境中,人体自动感应开关可以用于智能照明、安防监控等方面,提升家居生活的便利性和安全性。 四、雷达模组市场的人体自动感应开关发展趋势 随着物联网、智能家居等技术的快速发展,雷达模组市场的人体自动感应开关正迎来更加广阔的发展前景。未来,人体自动感应开关将朝着以下几个方向发展: 智能化:通过集成更多的传感器和算法,人体自动感应开关将实现更精准的人体识别和更丰富的功能拓展。 定制化:针对不同场景和需求,人体自动感应开关将提供个性化的定制服务,满足不同用户的特定需求。 集成化:人体自动感应开关将与其他智能家居设备实现无缝对接和协同工作,共同构建智能化的生活环境。 节能环保:随着环保意识的不断提高,人体自动感应开关将更加注重节能环保设计,降低能耗和排放。 五、结语 雷达模组市场的人体自动感应开关作为一种先进的智能控制技术,已经在多个领域得到了广泛应用。未来,随着技术的不断进步和市场的不断扩大,人体自动感应开关将为我们带来更加便捷、舒适和节能的生活体验。同时,我们也期待更多的创新和突破能够推动雷达模组市场的人体自动感应开关技术的不断发展。 在探讨雷达模组市场的人体自动感应开关原理的过程中,我们不难发现其背后蕴含的深厚科技底蕴和广泛应用前景。通过深入了解其工作原理和优势特点,我们可以更好地把握其在各个领域的应用潜力,并推动其在未来发展中的不断创新和进步。 本文虽然对雷达模组市场的人体自动感应开关原理进行了较为详细的阐述,但受限于篇幅和深度,仍有许多细节和前沿技术未能详尽展开。希望读者在阅读本文后,能够对人体自动感应开关有一个基本的了解和认识,并激发对相关技术的进一步探索和研究兴趣。在未来的科技发展道路上,人体自动感应开关无疑将扮演越来越重要的角色,为我们的生活带来更多便利和惊喜。
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19
2024-04

深圳雷达模组供应商:探索人体感应模块的前沿技术

发布时间: : 2024-04--19
随着科技的飞速发展和人们生活水平的提高,智能化、便捷化、舒适化已成为现代生活的新追求。人体感应技术作为实现这些追求的关键技术之一,正逐渐融入我们的日常生活。无论是智能家居的自动照明、智能安防的入侵检测,还是智能交通的人流统计,人体感应技术都发挥着重要作用。而深圳,作为中国的科技创新之都,其雷达模组供应商在人体感应技术领域的研究和应用,无疑走在了前列。 二、雷达模组与人体感应技术基础 雷达模组,即利用雷达原理进行目标探测和识别的模块。它通过发射电磁波并接收其反射信号,从而获取目标的距离、速度、方位等信息。在人体感应领域,雷达模组通过检测人体对电磁波的反射,实现非接触式的人体检测,具有高精度、高灵敏度、抗干扰能力强等优点。 人体感应技术则是利用传感器等设备,检测人体的存在和活动状态,从而触发相应的控制或反馈机制。雷达模组作为其中的一种传感器,通过其独特的探测原理,能够在各种环境下实现稳定、可靠的人体感应。 三、深圳雷达模组供应商的技术实力与市场表现 深圳作为中国的科技创新中心,汇聚了大量的优秀雷达模组供应商。这些供应商凭借强大的研发实力和敏锐的市场洞察力,不断推陈出新,为人体感应技术的发展做出了重要贡献。 在技术实力方面,深圳的雷达模组供应商拥有先进的生产设备、完善的研发体系和丰富的行业经验。不仅能够提供多样化的雷达模组产品,还能够根据市场需求进行定制化开发,满足各种应用场景的需求。 在市场表现方面,深圳的雷达模组供应商凭借其卓越的产品质量和良好的服务口碑,赢得了广大客户的信赖和认可。产品不仅在国内市场占有率持续上升,还远销海外,赢得了市场的青睐。 四、人体感应技术的市场应用与发展趋势 人体感应技术作为实现智能化、便捷化生活的重要手段,其市场应用前景广阔。在智能家居领域,人体感应技术可以实现自动照明、智能窗帘、智能空调等功能的自动化控制;在智能安防领域,它可以实现入侵检测、视频监控、报警联动等功能的安全防护;在智能交通领域,它可以实现人流统计、车辆检测、交通疏导等功能的智能化管理。 未来,随着物联网、人工智能等技术的不断发展,人体感应技术将与其他技术深度融合,实现更加智能化、精准化、个性化的应用。同时,随着市场需求的不断升级和变化,雷达模组供应商也需要不断创新和改进产品,以满足市场的新需求和新挑战。 五、用户指南与选择建议 对于用户来说,选择合适的雷达模组供应商和产品至关重要。以下是一些建议供用户参考: 首先,用户需要根据自己的应用场景和需求选择合适的产品类型和规格。不同的雷达模组产品具有不同的探测距离、角度、精度等性能参数,用户需要根据实际需求进行选择。 其次,用户需要关注供应商的研发实力和生产能力。一个有实力的供应商不仅能够提供高质量的产品,还能够根据市场需求进行定制化开发,满足用户的特殊需求。 用户还需要考虑供应商的服务水平和售后支持。一个好的供应商应该能够提供全面的技术支持和完善的售后服务,帮助用户解决使用过程中遇到的问题和困难。 六、结语 深圳的雷达模组供应商在人体感应技术领域的研究和应用方面取得了显著的成果和贡献。产品不仅丰富了市场选择,也推动了人体感应技术的不断发展和进步。随着科技的不断发展和市场的不断升级,我们有理由相信深圳的雷达模组供应商将继续保持其创新地位,为人体感应技术的发展做出更大的贡献。
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18
2024-04

毫米波雷达模组人体感应灯模块:科技照亮生活的新篇章

发布时间: : 2024-04--18
随着科技的不断发展,智能家居成为现代生活的一部分。毫米波雷达模组与人体感应灯模块的结合,为我们的生活带来了更多的便利和舒适。本文将深入探讨毫米波雷达模组在人体感应灯模块中的应用,以及它如何为我们的日常生活带来革命性的改变。 毫米波雷达模组技术解析 毫米波雷达模组是一种利用毫米波频段进行探测和感知的装置。它通过发射毫米波信号并接收反射回来的信号,从而实现对周围环境的感知。毫米波雷达模组具有穿透性强、分辨率高、抗干扰能力强等优势,因此在智能家居、安防监控等领域得到了广泛应用。 在智能家居领域,毫米波雷达模组可以实现人体检测、动作识别等功能。通过安装在家居环境中的毫米波雷达模组,我们可以实时感知家人的动态,从而实现智能控制、自动化管理等功能。例如,当毫米波雷达模组检测到有人进入房间时,可以自动开启房间的灯光、空调等设备,提供更加舒适的生活环境。 人体感应灯模块的工作原理及应用 人体感应灯模块是一种基于人体红外辐射进行感应的照明设备。它通过内置的红外传感器检测周围环境中的人体活动,当检测到有人体活动时,自动点亮灯具,实现人来灯亮、人走灯灭的效果。人体感应灯模块在节能、安全等方面具有显著优势,因此在家庭、办公室、商场等场所得到了广泛应用。 人体感应灯模块的工作原理主要基于人体红外辐射的特点。人体在不断地发出红外辐射,而人体感应灯模块的红外传感器可以检测到这种辐射。当传感器检测到有人体活动时,会触发内部的控制电路,从而点亮灯具。通过这种方式,人体感应灯模块可以实现对周围环境的智能感知和控制。 在家庭环境中,人体感应灯模块的应用可以带来很多便利。例如,在走廊、楼梯等地方安装人体感应灯模块,可以避免传统开关的不便,同时实现节能和安全的效果。在办公室中,人体感应灯模块可以根据员工的活动情况自动调节灯光亮度,提供更加舒适的工作环境。 毫米波雷达模组与人体感应灯模块的结合 将毫米波雷达模组与人体感应灯模块相结合,可以实现更加智能和精准的照明控制。毫米波雷达模组的高精度人体检测和动作识别能力,可以为人体感应灯模块提供更加准确和及时的控制信号。同时,毫米波雷达模组的抗干扰能力强、穿透性好的特点,也可以让人体感应灯模块在复杂环境下更加稳定可靠地工作。 在实际应用中,毫米波雷达模组与人体感应灯模块的结合可以带来很多创新性的应用场景。例如,在智能家居系统中,通过毫米波雷达模组的准确人体检测功能,可以实现更加智能化的照明控制,如根据家庭成员的活动情况自动调节灯光亮度、色温等参数,提供更加舒适和个性化的照明体验。此外,在安防监控领域,毫米波雷达模组与人体感应灯模块的结合也可以实现更加精准和智能的监控和报警功能,提高安全性和便利性。 市场前景与发展趋势 随着智能家居市场的不断发展和普及,毫米波雷达模组与人体感应灯模块的结合将具有广阔的市场前景。随着技术的不断进步和应用场景的不断拓展,毫米波雷达模组与人体感应灯模块的结合将带来更多的创新性和智能化应用,为人们的生活带来更多便利和舒适。 然而,也需要注意到毫米波雷达模组与人体感应灯模块的结合还存在一些技术挑战和市场挑战。例如,如何进一步提高毫米波雷达模组的探测精度和稳定性、如何降低成本并推动产品普及等。因此,未来需要在技术研发和市场推广方面持续努力,推动毫米波雷达模组与人体感应灯模块的结合更好地服务于人们的生活。 结论 毫米波雷达模组与人体感应灯模块的结合为智能家居领域带来了革命性的改变。通过精准的人体检测和动作识别能力,实现了更加智能和个性化的照明控制。随着技术的不断发展和市场的不断拓展,毫米波雷达模组与人体感应灯模块的结合将具有更加广阔的应用前景和发展空间。相信在不久的未来,这种智能照明控制技术将成为现代家庭不可或缺的一部分,为我们的生活带来更多的便利和舒适。
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