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兆易创新GD32-GigaDevice-兆易创新代理

兆易创新GD32E230K8U6-GD32 ARM Cortex-M23 Microcontroller

兆易创新GD32E230K8U6-GD32 ARM Cortex-M23 Microcontroller GigaDevice Semiconductor Inc. GD32E230xx ARM® Cortex®-M23 32-bit MCU Datasheet General description The GD32E230xx device belongs to the value line of GD32 MCU family. It is a new 32-bit general-purpose microcontroller based on the ARM® Cortex®-M23 core. The Cortex-M23 processor is an energy-efficient processor with a very low gate count. It is intended to be used for microcontroller and deeply embedded applications that require an area-optimized processor. The processor delivers high energy efficiency through a small but powerful instruction set and extensively optimized design, providing high-end processing hardware including a single-cycle multiplier and a 17-cycle divider. The GD32E230xx device incorporates the ARM® Cortex®-M23 32-bit processor core operating at up to 72 MHz frequency with Flash accesses 0~2 wait states to obtain maximum efficiency. It provides up to 64 KB embedded Flash memory and up to 8 KB SRAM memory. An extensive range of enhanced I/Os and peripherals connected to two APB buses. The devices offer one 12-bit ADC and one comparator, up to five general 16-bit timers, a basic timer, a PWM advanced timer, as well as standard and advanced communication interfaces: up to two SPIs, two I2Cs, two USARTs, and an I2S. The device operates from a 1.8 to 3.6 V power supply and available in –40 to +85 °C temperature range. Several power saving modes provide the flexibility for maximum optimization between wakeup latency and power consumption, an especially important consideration in low power applications. The above features make the GD32E230xx devices suitable for a wide range of applications, especially in areas such as industrial control, motor drives, user interface, power monitor and alarm systems, consumer and handheld equipment, gaming and GPS, E-bike and so on. Device information Table 2-1. GD32E230xx devices features and peripheral list   Part Number GD32E230xx   K4U6 K6U6 K8U6 K4T6 K6T6 K8T6 C4T6 C6T6 C8T6 FLASH (KB) 16 32 64 16 32 64 16 32 64 SRAM (KB) 4 6 8 4 4 8 4 6 8 Timers General timer(16-bit) 4 (2,13,15,16) 4 (2,13,15,16) 5 (2,13-16) 4 (2,13,15,16) 4 (2,13,15,16) 5 (2,13-16) 4 (2,13,15,16) 4 (2,13,15,16) 5 (2,13-16)   Advanced timer(16-bit) 1 (0) 1 (0) 1 (0) 1 (0) 1 (0) 1 (0) 1 (0) 1 (0) 1 (0)   SysTick 1 1 1 1 1 1 1 1 1   Basic timer(16-bit) 1 (5) 1 (5) 1 (5) 1 (5) 1 (5) 1 (5) 1 (5) 1 (5) 1 (5)   Watchdog 2 2 2 2 2 2 2 2 2   RTC 1 1 1 1 1 1 1 1 1 Connectivity   USART 1 (0) 2 (0-1) 2 (0-1) 1 (0) 2 (0-1) 2 (0-1) 1 (0) 2 (0-1) 2 (0-1)     I2C 1 (0) 1 (0) 2 (0-1) 1 (0) 1 (0) 2 (0-1) 1 (0) 1 (0) 2 (0-1)     SPI/I2S 1/1 (0)/(0) 1/1 (0)/(0) 2/1 (0-1)/(0) 1/1 (0)/(0) 1/1 (0)/(0) 2/1 (0-1)/(0) 1/1 (0)/(0) 1/1 (0)/(0) 2/1 (0-1)/(0) GPIO 27 27 27 25 25 25 39 39 39 CMP 1 1 1 1 1 1 1 1 1 EXTI 16 16 16 16 16 16 16 16 16 ADC Units 1
兆易创新GD32-GigaDevice-兆易创新代理
产品描述

兆易创新GD32E230K8U6-GD32 ARM Cortex-M23 Microcontroller
GigaDevice Semiconductor Inc.
GD32E230xx
ARM® Cortex®-M23 32-bit MCU
Datasheet

General description

The GD32E230xx device belongs to the value line of GD32 MCU family. It is a new 32-bit general-purpose microcontroller based on the ARM® Cortex®-M23 core. The Cortex-M23 processor is an energy-efficient processor with a very low gate count. It is intended to be used for microcontroller and deeply embedded applications that require an area-optimized processor. The processor delivers high energy efficiency through a small but powerful instruction set and extensively optimized design, providing high-end processing hardware including a single-cycle multiplier and a 17-cycle divider.
The GD32E230xx device incorporates the ARM® Cortex®-M23 32-bit processor core operating at up to 72 MHz frequency with Flash accesses 0~2 wait states to obtain maximum efficiency. It provides up to 64 KB embedded Flash memory and up to 8 KB SRAM memory. An extensive range of enhanced I/Os and peripherals connected to two APB buses. The devices offer one 12-bit ADC and one comparator, up to five general 16-bit timers, a basic timer, a PWM advanced timer, as well as standard and advanced communication interfaces: up to two SPIs, two I2Cs, two USARTs, and an I2S.
The device operates from a 1.8 to 3.6 V power supply and available in –40 to +85 °C temperature range. Several power saving modes provide the flexibility for maximum optimization between wakeup latency and power consumption, an especially important consideration in low power applications.
The above features make the GD32E230xx devices suitable for a wide range of applications, especially in areas such as industrial control, motor drives, user interface, power monitor and alarm systems, consumer and handheld equipment, gaming and GPS, E-bike and so on.

Device information

Table 2-1. GD32E230xx devices features and peripheral list

 

Part Number

GD32E230xx

 

K4U6

K6U6

K8U6

K4T6

K6T6

K8T6

C4T6

C6T6

C8T6

FLASH (KB)

16

32

64

16

32

64

16

32

64

SRAM (KB)

4

6

8

4

4

8

4

6

8

Timers

General

timer(16-bit)

4

(2,13,15,16)

4

(2,13,15,16)

5

(2,13-16)

4

(2,13,15,16)

4

(2,13,15,16)

5

(2,13-16)

4

(2,13,15,16)

4

(2,13,15,16)

5

(2,13-16)

 

Advanced

timer(16-bit)

1

(0)

1

(0)

1

(0)

1

(0)

1

(0)

1

(0)

1

(0)

1

(0)

1

(0)

 

SysTick

1

1

1

1

1

1

1

1

1

 

Basic

timer(16-bit)

1

(5)

1

(5)

1

(5)

1

(5)

1

(5)

1

(5)

1

(5)

1

(5)

1

(5)

 

Watchdog

2

2

2

2

2

2

2

2

2

 

RTC

1

1

1

1

1

1

1

1

1

Connectivity

 

USART

1

(0)

2

(0-1)

2

(0-1)

1

(0)

2

(0-1)

2

(0-1)

1

(0)

2

(0-1)

2

(0-1)

 

 

I2C

1

(0)

1

(0)

2

(0-1)

1

(0)

1

(0)

2

(0-1)

1

(0)

1

(0)

2

(0-1)

 

 

SPI/I2S

1/1

(0)/(0)

1/1

(0)/(0)

2/1

(0-1)/(0)

1/1

(0)/(0)

1/1

(0)/(0)

2/1

(0-1)/(0)

1/1

(0)/(0)

1/1

(0)/(0)

2/1

(0-1)/(0)

GPIO

27

27

27

25

25

25

39

39

39

CMP

1

1

1

1

1

1

1

1

1

EXTI

16

16

16

16

16

16

16

16

16

ADC

Units

1

1

1

1

1

1

1

1

1

 

Channels

(External)

 

10

 

10

 

10

 

10

 

10

 

10

 

10

 

10

 

10

 

Channels

(Internal)

 

2

 

2

 

2

 

2

 

2

 

2

 

2

 

2

 

2

Package

QFN32

LQFP32

LQFP48

 

 

Part Number

GD32E230xx

 

F4V6

F6V6

F8V6

F4P6

F6P6

F8P6

G4U6

G6U6

G8U6

FLASH (KB)

16

32

64

16

32

64

16

32

64

SRAM (KB)

4

6

8

4

6

8

4

6

8

Timers

General

timer(16-bit)

4

(2,13,15,16)

4

(2,13,15,16)

4

(2,13,15,16)

4

(2,13,15,16)

4

(2,13,15,16)

4

(2,13,15,16)

4

(2,13,15,16)

4

(2,13,15,16)

5

(2,13-16)

 

Advanced

timer(16-bit)

1

(0)

1

(0)

1

(0)

1

(0)

1

(0)

1

(0)

1

(0)

1

(0)

1

(0)

 

SysTick

1

1

1

1

1

1

1

1

1

 

Basic

timer(16-bit)

1

(5)

1

(5)

1

(5)

1

(5)

1

(5)

1

(5)

1

(5)

1

(5)

1

(5)

 

Watchdog

2

2

2

2

2

2

2

2

2

 

RTC

1

1

1

1

1

1

1

1

1

Connectivity

 

USART

1

(0)

2

(0-1)

2

(0-1)

1

(0)

2

(0-1)

2

(0-1)

1

(0)

2

(0-1)

2

(0-1)

 

 

I2C

1

(0)

1

(0)

2

(0-1)

1

(0)

1

(0)

2

(0-1)

1

(0)

1

(0)

2

(0-1)

 

 

SPI/I2S

1/1

(0)/(0)

1/1

(0)/(0)

2/1

(0-1)/(0)

1/1

(0)/(0)

1/1

(0)/(0)

2/1

(0-1)/(0)

1/1

(0)/(0)

1/1

(0)/(0)

2/1

(0-1)/(0)

GPIO

15

15

15

15

15

15

23

23

23

CMP

1

1

1

1

1

1

1

1

1

EXTI

16

16

16

16

16

16

16

16

16

ADC

Units

1

1

1

1

1

1

1

1

1

 

Channels

(External)

 

9

 

9

 

9

 

9

 

9

 

9

 

10

 

10

 

10

 

Channels

(Internal)

 

2

 

2

 

2

 

2

 

2

 

2

 

2

 

2

 

2

Package

LGA20

TSSOP20

QFN28

 

Memory map

Table 2-3. GD32E230xx memory map

Pre-defined

Regions

 

Bus

 

ADDRESS

 

Peripherals

 

 

0xE000 0000 - 0xE00F FFFF

Cortex M23 internal peripherals

External Device

 

0xA000 0000 - 0xDFFF FFFF

Reserved

External RAM

 

0x60000000 - 0x9FFFFFFF

Reserved

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Peripherals

 

AHB1

0x5004 0000 - 0x5FFF FFFF

Reserved

 

 

0x5000 0000 - 0x5003 FFFF

Reserved

 

 

 

 

 

AHB2

0x4800 1800 - 0x4FFF FFFF

Reserved

 

 

0x4800 1400 - 0x4800 17FF

GPIOF

 

 

0x4800 1000 - 0x4800 13FF

Reserved

 

 

0x4800 0C00 - 0x4800 0FFF

Reserved

 

 

0x4800 0800 - 0x4800 0BFF

GPIOC

 

 

0x4800 0400 - 0x4800 07FF

GPIOB

 

 

0x4800 0000 - 0x4800 03FF

GPIOA

 

 

 

 

 

 

 

AHB1

0x4002 4400 - 0x47FF FFFF

Reserved

 

 

0x4002 4000 - 0x4002 43FF

Reserved

 

 

0x4002 3400 - 0x4002 3FFF

Reserved

 

 

0x4002 3000 - 0x4002 33FF

CRC

 

 

0x4002 2400 - 0x4002 2FFF

Reserved

 

 

0x4002 2000 - 0x4002 23FF

FMC

 

 

0x4002 1400 - 0x4002 1FFF

Reserved

 

 

0x4002 1000 - 0x4002 13FF

RCU

 

 

0x4002 0400 - 0x4002 0FFF

Reserved

 

 

0x4002 0000 - 0x4002 03FF

DMA

 

 

 

 

 

 

 

 

 

 

 

APB2

0x4001 8000 - 0x4001 FFFF

Reserved

 

 

0x4001 5C00 - 0x4001 7FFF

Reserved

 

 

0x4001 5800 - 0x4001 5BFF

DBG

 

 

0x4001 4C00 - 0x4001 57FF

Reserved

 

 

0x4001 4800 - 0x4001 4BFF

TIMER16

 

 

0x4001 4400 - 0x4001 47FF

TIMER15

 

 

0x4001 4000 - 0x4001 43FF

TIMER14

 

 

0x4001 3C00 - 0x4001 3FFF

Reserved

 

 

0x4001 3800 - 0x4001 3BFF

USART0

 

 

0x4001 3400 - 0x4001 37FF

Reserved

 

 

0x4001 3000 - 0x4001 33FF

SPI0/I2S0

 

 

0x4001 2C00 - 0x4001 2FFF

TIMER0

 

 

0x4001 2800 - 0x4001 2BFF

Reserved

 

 

0x4001 2400 - 0x4001 27FF

ADC

 

 

0x4001 0800 - 0x4001 23FF

Reserved

 

Pre-defined

Regions

 

Bus

 

ADDRESS

 

Peripherals

 

 

0x4001 0400 - 0x4001 07FF

EXTI

 

 

0x4001 0000 - 0x4001 03FF

SYSCFG + CMP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

APB1

0x4000 CC00 - 0x4000 FFFF

Reserved

 

 

0x4000 C800 - 0x4000 CBFF

Reserved

 

 

0x4000 C400 - 0x4000 C7FF

Reserved

 

 

0x4000 C000 - 0x4000 C3FF

Reserved

 

 

0x4000 8000 - 0x4000 BFFF

Reserved

 

 

0x4000 7C00 - 0x4000 7FFF

Reserved

 

 

0x4000 7800 - 0x4000 7BFF

Reserved

 

 

0x4000 7400 - 0x4000 77FF

Reserved

 

 

0x4000 7000 - 0x4000 73FF

PMU

 

 

0x4000 6400 - 0x4000 6FFF

Reserved

 

 

0x4000 6000 - 0x4000 63FF

Reserved

 

 

0x4000 5C00 - 0x4000 5FFF

Reserved

 

 

0x4000 5800 - 0x4000 5BFF

I2C1

 

 

0x4000 5400 - 0x4000 57FF

I2C0

 

 

0x4000 4800 - 0x4000 53FF

Reserved

 

 

0x4000 4400 - 0x4000 47FF

USART1

 

 

0x4000 4000 - 0x4000 43FF

Reserved

 

 

0x4000 3C00 - 0x4000 3FFF

Reserved

 

 

0x4000 3800 - 0x4000 3BFF

SPI1

 

 

0x4000 3400 - 0x4000 37FF

Reserved

 

 

0x4000 3000 - 0x4000 33FF

FWDGT

 

 

0x4000 2C00 - 0x4000 2FFF

WWDGT

 

 

0x4000 2800 - 0x4000 2BFF

RTC

 

 

0x4000 2400 - 0x4000 27FF

Reserved

 

 

0x4000 2000 - 0x4000 23FF

TIMER13

 

 

0x4000 1400 - 0x4000 1FFF

Reserved

 

 

0x4000 1000 - 0x4000 13FF

TIMER5

 

 

0x4000 0800 - 0x4000 0FFF

Reserved

 

 

0x4000 0400 - 0x4000 07FF

TIMER2

 

 

0x4000 0000 - 0x4000 03FF

Reserved

 

SRAM

 

0x2000 2000 - 0x3FFF FFFF

Reserved

 

 

0x2000 0000 - 0x2000 1FFF

SRAM

 

 

 

Code

 

0x1FFF F810 - 0x1FFF FFFF

Reserved

 

 

0x1FFF F800 - 0x1FFF F80F

Option bytes

 

 

0x1FFF EC00 - 0x1FFF F7FF

System memory

 

 

0x0801 0000 - 0x1FFF EBFF

Reserved

 

 

0x0800 0000 - 0x0800 FFFF

Main Flash memory

 

 

0x0001 0000 - 0x07FF FFFF

Reserved

 

Pre-defined

Regions

 

Bus

 

ADDRESS

 

Peripherals

 

 

 

0x00000000 - 0x0000FFFF

Aliased to Flash or

system memory

ARM® Cortex®-M23 core

The Cortex-M23 processor is an energy-efficient processor with a very low gate count. It is intended to be used for microcontroller and deeply embedded applications that require an area-optimized processor. The processor is highly configurable enabling a wide range of implementations from those requiring memory protection and powerful trace technology to cost sensitive devices requiring minimal area, while delivering outstanding computational performance and an advanced system response to interrupts.
32-bit ARM® Cortex®-M23 processor core
Up to 72 MHz operation frequency
Single-cycle multiplication and hardware divider
Ultra-low power, energy-efficient operation
Excellent code density
Integrated Nested Vectored Interrupt Controller (NVIC)
24-bit SysTick timer

The Cortex®-M23 processor is based on the ARMv8-M architecture and supports both Thumb and Thumb-2 instruction sets. Some system peripherals listed below are also provided by Cortex®-M23:
Internal Bus Matrix connected with AHB master, Serial Wire Debug Port and Single-cycle IO port
Nested Vectored Interrupt Controller (NVIC)
Breakpoint Unit(BPU)
Data Watchpoint and Trace (DWT)
Serial Wire Debug Port


Embedded memory

Up to 64 Kbytes of Flash memory
Up to 8 Kbytes of SRAM with hardware parity checking

64 Kbytes of inner Flash and 8 Kbytes of inner SRAM at most is available for storing programs and data, both accessed (R/W) at CPU clock speed with 0~2 wait states. Table 2-3. GD32E230xx memory map shows the memory map of the GD32E230xx series of devices, including code, SRAM, peripheral, and other pre-defined regions.

Clock, reset and supply management

Internal 8 MHz factory-trimmed RC and external 4 to 32 MHz crystal oscillator

Internal 28 MHz RC oscillator
Internal 40 KHz RC calibrated oscillator and external 32.768 KHz crystal oscillator
Integrated system clock PLL
1.8 to 3.6 V application supply and I/Os
Supply Supervisor: POR (Power On Reset), PDR (Power Down Reset), and low voltage detector (LVD)
The Clock Control Unit (CCU) provides a range of oscillator and clock functions. These include speed internal RC oscillator and external crystal oscillator, high speed and low speed two types. Several prescalers allow the frequency configuration of the AHB and two APB domains. The maximum frequency of the AHB, APB2 and APB1 domains is 72 MHz/72 MHz/72 MHz. See Figure 2-8. GD32E230xx clock tree for details on the clock tree.
The Reset Control Unit (RCU) controls three kinds of reset: system reset resets the processor core and peripheral IP components. Power-on reset (POR) and power-down reset (PDR) are always active, and ensures proper operation starting from 1.71 V and down to 1.67 V. The device remains in reset mode when VDD is below a specified threshold. The embedded low voltage detector (LVD) monitors the power supply, compares it to the voltage threshold and generates an interrupt as a warning message for leading the MCU into security.
Power supply schemes:
VDD range: 1.8 to 3.6 V, external power supply for I/Os and the internal regulator. Provided externally through VDD pins.
VSSA, VDDA range: 1.8 to 3.6 V, external analog power supplies for ADC, reset blocks, RCs and PLL. VDDA and VSSA must be connected to VDD and VSS, respectively.
VBAK range: 1.8 to 3.6 V, power supply for RTC, external clock 32 KHz oscillator and backup registers (through power switch) when VDD is not present.

Boot modes

At startup, boot pins are used to select one of three boot options:
Boot from main Flash memory (default)
Boot from system memory
Boot from on-chip SRAM

In default condition, boot from main Flash memory is selected. The boot loader is located in the internal boot ROM memory (system memory). It is used to reprogram the Flash memory by using USART0 (PA9 and PA10) or USART1 (PA14 and PA15 or PA2 and PA3).

Power saving modes

The MCU supports three kinds of power saving modes to achieve even lower power consumption. They are sleep mode, deep-sleep mode, and standby mode. These operating modes reduce the power consumption and allow the application to achieve the best balance

between the CPU operating time, speed and power consumption.
Sleep mode
In sleep mode, only the clock of CPU core is off. All peripherals continue to operate and any interrupt/event can wake up the system.
Deep-sleep mode
In deep-sleep mode, all clocks in the 1.2V domain are off, and all of the high speed crystal oscillator (IRC8M, HXTAL) and PLL are disabled. Only the contents of SRAM and registers are retained. Any interrupt or wakeup event from EXTI lines can wake up the system from the deep-sleep mode including the 16 external lines, the RTC alarm, RTC tamper and timestamp, CMP output, LVD output and USART wakeup. When exiting the deep-sleep mode, the IRC8M is selected as the system clock.
Standby mode
In standby mode, the whole 1.2V domain is power off, the LDO is shut down, and all of IRC8M, HXTAL and PLL are disabled. The contents of SRAM and registers (except backup registers) are lost. There are four wakeup sources for the standby mode, including the external reset from NRST pin, the RTC alarm, the FWDGT reset, and the rising edge on WKUP pin.

Analog to digital converter (ADC)

12-bit SAR ADC's conversion rate is up to 2 MSPS
12-bit, 10-bit, 8-bit or 6-bit configurable resolution
Hardware oversampling ratio adjustable from 2 to 256x improves resolution to 16-bit
Input voltage range: VSSA to VDDA
Temperature sensor

One 12-bit 2 MSPS multi-channel ADC is integrated in the device. It has a total of 12 multiplexed channels: up to 10 external channels, 1 channel for internal temperature sensor (VSENSE) and 1 channel for internal reference voltage (VREFINT). The input voltage range is between VSSA and VDDA. An on-chip hardware oversampling scheme improves performance while off-loading the related computational burden from the CPU. An analog watchdog block can be used to detect the channels, which are required to remain within a specific threshold window. A configurable channel management block can be used to perform conversions in single, continuous, scan or discontinuous mode to support more advanced use.
The ADC can be triggered from the events generated by the general level 0 timers (TIMERx) and the advanced timer (TIMER0) with internal connection. The temperature sensor can be used to generate a voltage that varies linearly with temperature. It is internally connected to the ADC_IN16 input channel which is used to convert the sensor output voltage in a digital value.

DMA

5 channels DMA controller
Peripherals supported: Timers, ADC, SPIs, I2Cs, USARTs and I2S

The flexible general-purpose DMA controllers provide a hardware method of transferring data between peripherals and/or memory without intervention from the CPU, thereby freeing up bandwidth for other system functions. Three types of access method are supported: peripheral to memory, memory to peripheral, memory to memory.
Each channel is connected to fixed hardware DMA requests. The priorities of DMA channel requests are determined by software configuration and hardware channel number. Transfer size of source and destination are independent and configurable.

General-purpose inputs/outputs (GPIOs)

Up to 39 fast GPIOs, all mappable on 16 external interrupt lines
Analog input/output configurable
Alternate function input/output configurable

There are up to 39 general purpose I/O pins (GPIO) in GD32E230xx, named PA0 ~ PA15 and PB0 ~ PB15, PC13 ~ PC15, PF0 ~ PF1, PF6 ~ PF7 to implement logic input/output functions. Each of the GPIO ports has related control and configuration registers to satisfy the requirements of specific applications. The external interrupts on the GPIO pins of the device have related control and configuration registers in the Interrupt/event controller (EXTI). The GPIO ports are pin-shared with other alternative functions (AFs) to obtain maximum flexibility on the package pins. Each of the GPIO pins can be configured by software as output (push- pull open-drain or analog), as input (with or without pull-up or pull-down) or as peripheral alternate function. Most of the GPIO pins are shared with digital or analog alternate functions. All GPIOs are high-current capable except for analog inputs.

Timers and PWM generation

One 16-bit advanced timer (TIMER0), up to five 16-bit general timers (TIMER2, TIMER13
~ TIMER16), and one 16-bit basic timer (TIMER5)
Up to 4 independent channels of PWM, output compare or input capture for each general timer and external trigger input
16-bit, motor control PWM advanced timer with programmable dead-time generation for output match
Encoder interface controller with two inputs using quadrature decoder
24-bit SysTick timer down counter
2 watchdog timers (free watchdog timer and window watchdog timer)

The advanced timer (TIMER0) can be used as a three-phase PWM multiplexed on 6 channels.

It has complementary PWM outputs with programmable dead-time generation. It can also be used as a complete general timer. The 4 independent channels can be used for input capture, output compare, PWM generation (edge- or center- aligned counting modes) and single pulse mode output. If configured as a general 16-bit timer, it has the same functions as the TIMERx timer. It can be synchronized with external signals or to interconnect with other general timers together which have the same architecture and features.
The general timer can be used for a variety of purposes including general time, input signal pulse width measurement or output waveform generation such as a single pulse generation or PWM output, up to 4 independent channels for input capture/output compare. TIMER2 is based on a 16-bit auto-reload up/down counter and a 16-bit prescaler. TIMER13 ~ TIMER16 is based on a 16-bit auto-reload up counter and a 16-bit prescaler. The general timer also supports an encoder interface with two inputs using quadrature decoder.
The basic timer, known as TIMER5 can also be used as a simple 16-bit time base.

The GD32E230xx have two watchdog peripherals, free watchdog and window watchdog. They offer a combination of high safety level, flexibility of use and timing accuracy.
The free watchdog timer includes a 12-bit down-counting counter and an 8-bit prescaler. It is clocked from an independent 40 KHz internal RC and as it operates independently of the main clock, it can operate in deep-sleep and standby modes. It can be used either as a watchdog to reset the device when a problem occurs, or as a free-running timer for application timeout management.
The window watchdog is based on a 7-bit down counter that can be set as free-running. It can be used as a watchdog to reset the device when a problem occurs. It is clocked from the main clock. It has an early wakeup interrupt capability and the counter can be frozen in debug mode.
The SysTick timer is dedicated for OS, but could also be used as a standard down counter. The features are shown below:
A 24-bit down counter
Auto reload capability
Maskable system interrupt generation when the counter reaches 0
Programmable clock source


Real time clock (RTC)

Independent binary-coded decimal (BCD) format timer/counter with five 32-bit backup registers.
Calendar with subsecond, second, minute, hour, week day, date, year and month automatically correction
Alarm function with wake up from deep-sleep and standby mode capability
On-the-fly correction for synchronization with master clock. Digital calibration with 0.954 ppm resolution for compensation of quartz crystal inaccuracy.

The real time clock is an independent timer which provides a set of continuously running counters in backup registers to provide a real calendar function, and provides an alarm interrupt or an expected interrupt. It is not reset by a system or power reset, or when the device wakes up from standby mode. In the RTC unit, there are two prescalers used for implementing the calendar and other functions. One prescaler is a 7-bit asynchronous prescaler and the other is a 15-bit synchronous prescaler.

Inter-integrated circuit (I2C)

Up to two I2C bus interfaces can support both master and slave mode with a frequency up to 1 MHz (Fast mode plus)
Provide arbitration function, optional PEC (packet error checking) generation and checking
Supports 7-bit and 10-bit addressing mode and general call addressing mode
Supports SAM_V mode

The I2C interface is an internal circuit allowing communication with an external I2C interface which is an industry standard two line serial interface used for connection to external hardware. These two serial lines are known as a serial data line (SDA) and a serial clock line (SCL). The I2C module provides different data transfer rates: up to 100 KHz in standard mode, up to 400 KHz in the fast mode and up to 1 MHz in the fast mode plus. The I2C module also has an arbitration detect function to prevent the situation where more than one master attempts to transmit data to the I2C bus at the same time. A CRC-8 calculator is also provided in I2C interface to perform packet error checking for I2C data.

Serial peripheral interface (SPI)

Up to two SPI interfaces with a frequency of up to 18 MHz
Support both master and slave mode
Hardware CRC calculation and transmit automatic CRC error checking
Separate transmit and receive 32-bit FIFO with DMA capability (only in SPI1)
Data frame size can be 4 to 16 bits (only in SPI1)
Quad-SPI configuration available in master mode (only in SPI1)

The SPI interface uses 4 pins, among which are the serial data input and output lines (MISO & MOSI), the clock line (SCK) and the slave select line (NSS). Both SPIs can be served by the DMA controller. The SPI interface may be used for a variety of purposes, including simplex synchronous transfers on two lines with a possible bidirectional data line or reliable communication using CRC checking. Specially, SPI1 has separate transmit and receive 32- bit FIFO with DMA capability and its data frame size can be 4 to 16 bits. Quad-SPI master mode is also supported in SPI1.

Universal synchronous asynchronous receiver transmitter (USART)
Up to two USARTs with operating frequency up to 4.5 MBits/s
Supports both asynchronous and clocked synchronous serial communication modes
IrDA SIR encoder and decoder support
LIN break generation and detection
ISO 7816-3 compliant smart card interface

The USART (USART0, USART1) are used to translate data between parallel and serial interfaces, provides a flexible full duplex data exchange using synchronous or asynchronous transfer. It is also commonly used for RS-232 standard communication. The USART includes a programmable baud rate generator which is capable of dividing the system clock to produce a dedicated clock for the USART transmitter and receiver. The USART also supports DMA function for high speed data communication.

Inter-IC sound (I2S)

One I2S bus Interfaces with sampling frequency from 8 KHz to 192 KHz, multiplexed with SPI0
Support either master or slave mode

The Inter-IC sound (I2S) bus provides a standard communication interface for digital audio applications by 3-wire serial lines. GD32E230xx contain an I2S-bus interface that can be operated with 16/32 bit resolution in master or slave mode, pin multiplexed with SPI0. The audio sampling frequency from 8 KHz to 192 KHz is supported with less than 0.5% accuracy error.

Comparators (CMP)

One fast rail-to-rail low-power comparators with software configurable
Programmable reference voltage (internal or external I/O)

One Comparator (CMP) is implemented within the devices. It can wake up from deep-sleep mode to generate interrupts and breaks for the timers and also can be combined as a window comparator. The internal voltage reference is also connected to ADC_IN17 input channel of the ADC.

Debug mode

Serial wire debug port

Debug capabilities can be accessed by a debug tool via Serial Wire (SW - Debug Port).


Package and operation temperature

LQFP48 (GD32E230CxTx), LQFP32 (GD32E230KxTx), QFN32 (GD32E230KxUx), QFN28 (GD32E230GxUx), TSSOP20 (GD32E230FxPx) and LGA20 (GD32E230FxVx).
Operation temperature range: -40°C to +85°C (industrial level)

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uA级别智能门锁低功耗雷达模块让门锁更加智能省电节约功耗

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发布时间: : 2022-02--07
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蓝牙Beacon 2.4G wifi无线模组特点门铃场景中的应用

发布时间: : 2022-09--29
蓝牙Beacon 2.4G wifi无线模组特点门铃场景中的应用,低功耗蓝牙Beacon技术让很多商家产生了兴趣,通过Beacon技术向兼容的移动设备发送信号,可以推广商品以及活动信息等吸引消费者。Beacon 2.4G wifi无线模组通过蓝牙的广播和扫描协议进行通讯,下面介绍Beacon 2.4G无线模块的特点,以及应用在哪些项目中。 Beacon 2.4G wifi无线模组的特点 1.可与手机相连的2.4G模块 2.可与BLE设备相互通讯 3.支持开发Beacon、iBeacon协议 4.通过蓝牙的广播和扫描协议进行通讯 蓝牙Beacon 2.4G wifi无线模组一般在哪些项目中使用 一、商场、展柜消息推送 当消费者在商场中靠近某个安装有Beacon设备的展柜一定范围时,如果消费者的手机与Beacon设备相兼容,那么就可以推送消息给消费者,比如通知消费者有哪些新品,哪些产品正在打折等等,以这样的方式刺激消费访问商家。 二、室内定位 将beacon设备放置在某些场所,可以了解到用户位置的变化。 将距离简单分为三级。苹果在iOS中并不仔细推断距离,将距离分为贴近贴近(Immediate)、1m以内(Near)、1m以上(Far)三种距离状态。 距离在1m以内时,RSSI值基本上成比例减少,而距离在1m以上时,由于反射波的影响等,RSSI不减少而是上下波动。也就是说,相距1m以上时无法推断距离,因此就简单判定为Far。 三、数据传送(温湿度传送) 可以将采集的温度通过Beacon广播发给手机。 以上就是Beacon 2.4G wifi无线模组的特点,这款产品常应用在无线鼠标、无线健康运动产品、商品信息推送、无线遥感、报警安保系统、无线测距系统等行业中。 2.4G wifi无线模组在门铃场景中的应用,门铃是现代生活常见的一个生活家具,它可以用于城市中的高楼大厦、高层住宅、甚至我们的民间楼房都可以使用到门铃。门铃从只有客人叫门的作用,发展到现在门户信息之间的传递、大门控制、出现紧急情况向门卫报警等等功能,都预示着门铃不断向着智能发现发展。 传统的门铃安装方式都是有线安装,发射器和接收器都是依靠电线连接的,发射器发出的信号是通过电线传输至接收器,所以有线门铃大优势就是它的信号比较稳定,也不会发生误响等情况,但是由于布线比较麻烦,很可能需要凿墙等,在如今遍地都是高楼大厦的城市中,显得很是麻烦,因而近几年逐渐淡出市场。 有线门铃的淡出,也意味着无线门铃的兴起,现在一栋栋的高楼大厦不断的建设当中,无线门铃的应用市场也是相当的巨大。那么大家知道无线门铃的原理是什么吗? 无线门铃关键的一点,就是如何取代有线方式的信号传输问题?现在市面上的无线门铃是在发射器和接收器中各安装一个2.4Gwifi无线模组来代替线缆的信号传输,无线模块可以很有效的解决凿墙布线的问题,还可以节省不少的成本,成为当下主流的无线门铃选择方案。 但是市面有各式各样,不同类型的无线模块,那么无线门铃一般都是选择那种来使用呢?大家都知道门铃的价格一直都是非常的便宜,所以2.4Gwifi无线模组就成为了无线门铃的首选,有人会问了,为什么不是选择同样便宜的蓝牙模块呢?那是因为蓝牙模块的传输距离比较短,且蓝牙模块之间只能点对点使用,不符合实际的应用场景。 2.4G wifi无线模组是可以进行二次开发的,通过单片机,写入一段程序,控制无线模块进行工作。无线模块就设有一个数据端口方便用户直接连接单片机,目的就是为了用户研发和生产的时候更加方便快捷。
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28
2022-09

远距离WiFi模块抗干扰能力的提高

发布时间: : 2022-09--28
远距离WiFi模块抗干扰能力的提高,远距离WiFi模块的抗干扰能力是无法进行具体数值化,所以它一般不会做为常规参数放在无线模块的规格书里,那么无线模块的抗干扰能力到底重不重要呢?答案是:非常重要。在同一发射功率和接收灵敏度的条件下,那么抗干扰能力更强的无线模块可以传输的距离会更远。 为什么提高抗干扰能力会提高通讯距离呢?远距离WiFi模块在收发通讯时,干扰源是无处不在的(磁场、金属、墙壁等),信号在空中发射时就会受到干扰源的不断干扰,导致信号强度会不断衰弱,到信号衰减到一定程度时,接收机就会接收不到发射过来的信号,从而导致通讯距离的缩短。 干扰源可以完全规避吗?哪怕是有线的通讯方式也会存在干扰的情况,所以我们没有办法去完全规避掉干扰源,所以好的办法就是提高无线模块的抗干扰能力,那么提高远距离WiFi模块抗干扰能力有哪些呢? 1. 远离干扰源 尽量避免在干扰源多的地方使用无线模块(避开干扰源是有效且直接的办法)。 2. 带宽 在无线通讯领域中,带宽越窄,代表着抗干扰能力就越好,所以适当的修改无线模块的带宽,可以很好提升无线模块在通讯时的抗干扰能力。 3. 降低传输速率 传输速率越快,会导致信号强度衰减的越快,适当的降低传输速率可以增强信号强度,从而提升无线模块的抗干扰能力。 4. 定向天线 我们发射远距离WiFi模块可以采用高增益的定向天线,定向天线它可以指定某一个或者多个方向发射及接收电磁波特别强,而在其他的方向上发射及接收电磁波则为零或极小的一种天线。定向天线的用处就是可以增加信号的强度,从而提升无线模块的抗干扰能力。 5. 屏蔽罩 屏蔽罩是无线模块提高的抗干扰能力好一个办法,屏蔽罩的可以屏蔽掉一定外界干扰源对芯片的影响,同时也能防止无线模块工作时对外界产生干扰和辐射。 6. 滤波器 滤波器是根据频率来区分的,例如:433MHz就只能使用对应频率的滤波器,它主要的功能是过滤掉其他不属于433MHz的频率,防止受到其他频段的干扰,从而达到抗干扰能力的效果。 今天的如何提高远距离WiFi模块的抗干扰能力就到这里结束了,如果您还有更好的提高抗干扰能力的方法也可以分享给我们,欢迎大家随时联系我司。 远距离WiFi模块为什么要加屏蔽罩外壳?作为现代化物联网中重要的一个环节,在市场上的可以说是非常受欢迎的。远距离WiFi模块的种类也可以说是五花八门,各种功能的无线模块在市面上都逐一崭露头角。但是大家有注意到大部分无线模块都会带有一个金属外壳吗?又知道这个金属外壳对无线模块能起到什么作用吗? 远距离WiFi模块上的金属外壳叫屏蔽罩,属于无线模块一个硬件设施之一,它的主要作用分为两个: 1.防止无线模块工作时对外界产生干扰和辐射;功率越大的无线模块产生的干扰和辐射也会相应的越大,所以加一个金属外壳可以在一定程度上减小这些干扰和辐射。 2.屏蔽外界对远距离WiFi模块产生干扰;在无线模块的工作环境当中,有很多复杂干扰源,如外界电场、磁场这种看不见也摸不着干扰源用存在着。但是,给无线模块加上屏蔽罩之后,就可以很好的隔绝了这些外界的干扰源。 那么屏蔽罩的工作原理是什么呢?用屏蔽罩将需要保护的继电器、芯片、单片机、电路板等重要功能元器件包围起来,从而形成一个保护圈,既可以有效防止无线模块产生的辐射干扰对外扩散,也可以防止外界干扰源对无线模块的正常工作产生干扰。 屏蔽罩的注意事项: 1.屏蔽罩并不是必需品,我们可以根据实际的情况来判断无线模块是否需要带屏蔽罩。例如考虑到成本、外观、实际设备使用情况等判断是否需要屏蔽罩。 2.使用屏蔽罩时,要考虑的因素有很多,例如屏蔽罩的尺寸大小、屏蔽罩离电子元器件的距离、屏蔽罩的材料等等,这些因素都是非常重要的;因为屏蔽罩设计的不够理想的话,很有可能会影响无线模块的性能。思为无线每一款无线模块上的屏蔽罩都是我司硬件工程师精心设计而成的,可以屏蔽大部分外界干扰,保证模块的正常工作。 总得来说,屏蔽罩对远距离WiFi模块是非常重要的,一是它可以提高无线模块的抗干扰能力,二是抗干扰能力越强也相对应的会提升模块的传输距离,所以无线模块加一个屏蔽罩外壳还是非常有必要的。但是,屏蔽罩并不是无线模块的必需品,这点在上文的注意事项中说得很清楚。  
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27
2022-09

智能家电wifi模组常见问题天线长度与频率波长的关系

发布时间: : 2022-09--27
智能家电wifi模组常见问题天线长度与频率波长的关系,智能家电wifi模组块在使用过程中,往往会遇见各种问题,今天整理了一份近几年来,客户常遇见的问题,希望能帮助到大家。 1. 智能家电wifi模组死机 1)查供电电源(电源负载电流是否比模块规格书上的发射电流大,电源类型) 2)是否影响到别的设备。(工作环境中,是否有其他的无线设备) 2. 智能家电wifi模组正常使用一段时间后,通讯距离越来越短怎么办? 这种情况,一般是硬件电路损坏,需要寄回维修。 3. 智能家电wifi模组发射不出信号或者通讯不上? 1)检查模块硬件接线是否有问题 2)看SPI是否能读寄存器值,如果是则说明接线正确,否则反之。 3)检查供电,是否达到工作电压(可通过降低功率确定) 4. 是否支持跳频功能? 不支持芯片自动跳频,需单片机设置频率 5. 同样的程序,在别的厂商的无线模块上可以正常工作,为什么我司的维修模块不能正常工作? 不同厂家的无线模块的天线、晶振不同,所以程序不一定匹配。 6. 我司的智能家电wifi模组是否能和别的厂商通讯? 实际的频率不一样,不能和别的厂商的无线模块通讯。(实际频率要用频谱仪测试) 7. 无线模块为什么发烫? 天线开关没有控制好。 8. 智能家电wifi模组怎么进入休眠状态? 用SPI接口发送指令,具体可参考我司对应的模块DOMO程序。 9. 无线模块怎么修改速率/频率?或某个无线模块速率/频率对应的参数值是多少? 每个无线模块都有寄存器手册或者配置软件,计算出需要修改的寄存器值,可通过SPI接口发送指令给无线模块 10. 智能家电wifi模组怎么设置功率? 每个无线模块的规格书都可以查看相对应的功率对照表。 11. 模块休眠时,为何接收不到数据? 无线模块在休眠状态时,是处于关闭无线的状态,这种情况下是无法接收数据 12. 无线模块如何从休眠中唤醒? 通过SPI接口发送任何指令。 13. 智能家电wifi模组如何实现无线远程唤醒? 除si4463模块有自带的LDC功能外,其他的前端无线模块都需单片机定时控制模块在休眠和接收中切换。 14. 无线模块一次可以发送多少字节? FSK系列模块的一次64字节,LORA系列模块一次255个字节,2.4G系列一次32个字节 15. 智能家电wifi模组如何实现大数据发送? 我们需要通过单片机设置好进行分包发送。 智能家电wifi模组常见的问题大概整理15条,希望能够帮助到大家。相关常见问题,也会近日整理出给到大家。如果您还有其他的问题欢迎联系我们。 天线长度与频率、波长的关系 天线在通信领域使用的范围很广,有的客户不知道天线长度和频率、波长有什么关系,天线长度的计算公式是什么,有时候看到网上卖的同频率的天线有长有短,心里疑惑不已,下面为大家分析天线长度与频率、波长的关系。 智能家电wifi模组天线长度与频率、波长的关系 天线长度与频率成反比,与波长成正比,频率越高,波长越短,天线也就可以做得越短。 天线长度计算公式 当天线的长度为波长的1/4时,天线的发射和接收转换效率高。 因此,天线的长度将根据所发射和接收信号的频率即波长来决定。用下面的公式可以计算出波长,然后将算出的波长除以4就是对应的佳天线长度。 频率与波长的换算公式为: 波长=30万公里/频率 =300000000米/频率 (得到的单位为米)) 例如:无线数传电台使用的信号频率为435MHz,波长为: 波长= 300000公里/435MHz = 300000000/435000000 = 300/435 = 0.69米 对应的天线长度应为 0.69/4 ,等于0.1725米 以上就是天线长度与频率|波长的关系,天线的长度中心工作频率的波长有直接关系,在购买的时候我们也许会发现天线似乎没有那么长,那是因为厂家用加感的方式缩短长度,如果把里面一圈圈的线材拉直,长度也是接近波长的四分之一的。
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